ABB REG670 - Technical Data

15.6.3.3 Technical data
Table 517: Number of INV instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
INV 90 90 240
15.6.4 Loop delay function block LLD
The Logic loop delay function block (LLD) function is used to delay the output signal
one execution cycle, that is, the cycle time of the function blocks used.
15.6.4.1 Function block
LLD
INPUT OUT
IEC15000144.vsd
IEC15000144 V1 EN
Figure 379: LLD function block
15.6.4.2 Signals
Table 518: LLD Input signals
Name
Type Default Description
INPUT BOOLEAN 0 Input signal
Table 519: LLD Output signals
Name
Type Description
OUT BOOLEAN Output signal delayed one execution cycle
15.6.4.3 Technical data
Table 520: Number of LLD instances
Logic block
Quantity with cycle time
3 ms 8 ms 100 ms
LLD 10 10 20
15.6.5 OR function block
The OR function is used to form general combinatory expressions with boolean
variables. The OR function block has up to six inputs and two outputs. One of the
outputs is inverted.
1MRK502052-UEN B Section 15
Logic
813
Technical manual