en06000606_ansi.vsd
I
F
V
S
V
’
M
=
xV
L
xV
S
I
F
x
V
L
V
S
x
V
C
V
M
xV
S
With bypassed
capacitor
With inserted
capacitor
ANSI06000606 V1 EN-US
Figure 111: Phasor diagrams of currents and voltages for the bypassed and
inserted series capacitor during voltage inversion
It is obvious that voltage V
M
will lead the fault current I
F
as long as X
L1
> X
C
. This
situation corresponds, from the directionality point of view, to fault conditions on line
without series capacitor. Voltage V
M
in IED point will lag the fault current I
F
in case
when:
EQUATION1902 V1 EN-US (Equation 104)
Where
X
S
is the source impedance behind the IED
The IED point voltage inverses its direction due to presence of series capacitor and its
dimension. It is a common practice to call this phenomenon voltage inversion. Its
consequences on operation of dif
ferent protections in series compensated networks
depend on their operating principle. The most known ef
fect has voltage inversion on
directional measurement of distance IEDs (see chapter
"Distance protection" for more
details), which must for this reason comprise special measures against this
phenomenon.
There will be no voltage inversion phenomena for reverse faults in system with VT
s
located on the bus side of series capacitor
. The allocation of VTs to the line side does
not eliminate the phenomenon, because it appears again for faults on the bus side of
IED point.
Current inversion
GUID-9F7FDF59-D0B4-4972-9CB0-B3D56DACA09E v1
Figure
112 presents part of a series compensated line with corresponding equivalent
voltage source. It is generally anticipated that fault current I
F
flows on non-
compensated lines from power source towards the fault F on the protected line. Series
capacitor may change the situation.
1MRK 502 071-UUS A Section 8
Impedance protection
Generator protection REG670 2.2 ANSI and Injection equipment REX060, REX061, REX062 249
Application manual
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