During disturbed conditions, the trip security function can cope with high bit error
rates up to 10
-5
or even up to 10
-4
. The trip security can be configured to be
independent of COMFAIL from the dif
ferential protection communication supervision,
or blocked when COMFAIL is issued after receive error >100ms. (Default).
Synchronization in SDH systems with G.703 E1 or IEEE C37.94
The G.703 E1, 2 Mbit shall be set according to ITU-T G.803, G.810-13
• One master clock for the actual network
• The actual port Synchronized to the SDH system clock at 2048 kbit
• Synchronization; bit synchronized, synchronized mapping
• Maximum clock deviation <±50 ppm nominal, <±100 ppm operational
• Jitter and Wander according to ITU-T G.823 and G.825
• Buffer memory <250 μs, <100 μs asymmetric difference
• Format.G 704 frame, structured etc.Format.
• No CRC-check
Synchronization in PDH systems connected to SDH systems
• Independent synchronization, asynchronous mapping
• The actual SDH port must be set to allow transmission of the master clock from
the PDH-system via the SDH-system in transparent mode.
• Maximum clock deviation <±50 ppm nominal, <±100 ppm operational
• Jitter and Wander according to ITU-T G.823 and G.825
• Buffer memory <100 μs
• Format: Transparent
• Maximum channel delay
• Loop time <40 ms continuous (2 x 20 ms)
IED with echo synchronization of differential clock (without GPS clock)
• Both channels must have the same route with maximum asymmetry of 0,2-0,5 ms,
depending on set sensitivity of the differential protection.
• A fixed asymmetry can be compensated (setting of asymmetric delay in built in
HMI or the parameter setting tool PST).
IED with GPS clock
• Independent of asymmetry.
Section 24 1MRK 502 071-UUS A
Requirements
812 Generator protection REG670 2.2 ANSI and Injection equipment REX060, REX061, REX062
Application manual
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