V
N
PU
_
ST1
TRST1
PU
_
ST2
TRST2
PICKUP
TRIP
Comparator
Pickup 1
Pickup
&
Trip
Output
Logic
Step 2
Time integrator
tIReset2
ResetTypeCrv2
PICKUP
Pickup
&
Trip
Output
Logic
Step 1
Time integrator
tIReset1
ResetTypeCrv1
PICKUP
TRIP
OR
OR
Comparator
VN >
Pickup2
Phase 1
TRIP
Phase 1
t1
tReset1
t2
tReset2
VN >
ANSI05000748-2-en.vsd
ANSI05000748 V2 EN-US
Figure 345: Schematic design of Two step residual overvoltage protection ROV2PTOV (59N)
9.3.8 Technical data
M13317-2 v12
Table 353: ROV2PTOV (59N) technical data
Function Range or value Accuracy
Trip voltage, step 1 and step 2 (1.0-200.0)% of
VBase
± 0.5% of V
n
at V < V
n
± 0.5% of V
n
at V > V
n
Absolute hysteresis (0.0–50.0)% of
VBase
± 0.5% of V
n
at V < V
n
± 0.5% of V
n
at V > V
n
Inverse time characteristics for low
and high step, see table 1086
- See table 1086
Definite time delay low step (step 1)
at 0 to 1.2 x V
set
(0.00–6000.00) s ± 0.2% or ± 45 ms whichever is
greater
Definite time delay high step (step
2) at 0 to 1.2 x V
set
(0.000–60.000) s ± 0.2% or ± 45 ms whichever is
greater
Minimum trip time (0.000-60.000) s ± 0.2% or ± 45 ms whichever is
greater
Trip time, pickup at 0 to 2 x V
set
Min. = 15 ms
Max. = 30 ms
-
Reset time, pickup at 2 to 0 x V
set
Min. = 15 ms
Max. = 30 ms
-
Table continues on next page
1MRK 502 066-UUS B Section 9
Voltage protection
635
Technical manual
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