ABB Relion 670 series - Page 988

GUID-19810098-1820-4765-8F0B-7D585FFC0C78 v6
Table 685: Number of instances in the extension logic package
Logic block Quantity with cycle time
3 ms 8 ms 100 ms
AND 40 40 100
GATE - - 49
INV 40 40 100
LLD - - 49
OR 40 40 100
PULSETIMER 5 5 49
SLGAPC 10 10 54
SRMEMORY - - 110
TIMERSET - - 49
VSGAPC 10 10 110
XOR - - 49
15.9 Fixed signals FXDSIGN
15.9.1 Identification
SEMOD167904-2 v2
Function description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Fixed signals FXDSIGN - -
15.9.2 Functionality
M15322-3 v11
The Fixed signals function FXDSIGN generates nine pre-set (fixed) signals that can be used in the
configuration of an IED, either for forcing the unused inputs in other function blocks to a certain
level/value, or for creating certain logic. Boolean, integer, floating point, string types of signals are
available.
One FXDSIGN function block is included in all IEDs.
Section 15 1MRK 502 066-UUS B
Logic
982
Technical manual