Synchronization in PDH systems connected to SDH systems
• Independent synchronization, asynchronous mapping
• Actual SDH port set to allow transmission of the master clock from the PDH
network (SDH network in transparent mode)
• Maximum clock deviation: < ±50 ppm nominal, < ±100 ppm operational
• Jitter and wander according to ITU-T G.823 and G.825
• Buffer memory: <1 00 μs
• Format: transparent
• Maximum channel delay
• Loop time: < 40 ms continuous (2 x 20 ms)
Line differential protection IED with echo synchronization (no GPS
clock)
• Both channels to have the same route with maximum asymmetry of 0.2–0.5
ms depending on the set sensitivity of the line differential protection function
• Fixed asymmetry can be compensated for by setting the AsymDelay on the
local HMI or via PST
Line differential protection IED with GPS synchronization (GPS clock)
• Independent of asymmetry
Section 6 1MRK 505 382-UEN B
Appendix
102 Communication set-up 670/650 series 2.2
Application Guide