Aiwa CSD-EX5 - Page 11

Description
Fin Ne | Pin Wane [179]
E _ -
61
62 LPFN af
63
65
67
TMAX signal output terminal. HiZ in system clock.
TMAX cycle TMAX output
Longer than specified cycle L
Shorter than specified cycle H(2VREF)
Specified cycle HiZ
LPF amplifier negative-phase input termina] for PLL.
a
eee ere
ee fveor a
[ss | veo [a
[ss | pice |
[er
se
[68
LPF amplifier output terminal for PLL.
vcO filter terminal.
External ¥CO clock input terminal. (GND)
Playback data read clock output terminal. (Not used. )
MODO
MOD1
Internal operation mode setting input terminal. (GND)
Internal operation mode setting input termina].
WDCK ¥ord clock output terminal. Normally 88. 2kHz. (Not used. )
CHCK
Channel clock output terminal. Normally 44. 1kHz.
Bit clock output terminal. Normally 1. 4112MHz.
I 70
ae
or
Ee
cal
| 73 | Aout | 0 | Audio data output termina,
ee ee eee oe Digital OUT output terminal. (Not used. )
Ea
zZ
ew
fae]
Eee] Es
Test terminal. Normally "H” or open. (Not used. )
High-speed monitor output terminal. High-speed mode when "L". (Not used. )
Emphasis ON/OFF indication signal output terminal. Emphasis ON when "H",
Test terminal. Normally "H” or open. (Not used. )
Master clock output terminal. (Not used. )
IC,LC7218M
N Connected to the crystal clock oscillator.
Ez TMP47C820F-3638 (TMP47C820F-3665).
ee
MODE1
OUTI1
oor
t
}
Tuner
sound
mode
FM
mode
oe
Eee
ont Wien!
I
CE
DI Input terminal of contro] data from microcomputer
CL
onl
SYN
selection output.
Tuner band selection output
MODE2 OUT2
FM OUT3
ee es
ze
| 8
SW (MW) OUT4
at
cS Tuner band selection output
ol
MW (LW) OUT
Fal |
[o [ er tnd ection wipe SSS
FuOUTE [0 | Ter od stern wt AE
rx
Fg
po | 0 | twin vite omit wt
a
=
on
vec
Q
GND
XOUT
Connected to crystal oscillator.
16