Publication 1336 IMPACT-6.2 – March 1998
A
Adapter Locations, 1–10
Adapters and Communication Ports, Human
Interface Module, 1–9
Audience for this Manual, P–1
Auxiliary Interlock, Definition, P–10
B
Bit, Definition, P–10
Bus Capacitor Bank
Illustration, 5–21
Installation, 5–23
Removal, 5–21
Test, 4–5
Bus Fuse F1
Illustration, 5–7
Installation, 5–8
Test, 4–10
C
Check, Definition, P–10
Component Test Procedures, 4–1
Connector, Definition, P–10
Control Firmware Function, 1–13
Control Interface L-Option. See L Option
Board
Control Logic Wiring, 1–1
Conventions in this Manual, P–10
D
DC Bus Inductor
Illustration, 5–18
Installation, 5–20
Removal, 5–19
Default, Definition, P–10
Drive
Enclosure Type, P–9
Identification, P–4
Illustration, 5–3
Nameplate Location, P–3
Rating, P–9
Drive Enclosure
Illustration, 3–5
Installation, 3–6
Removal, 3–6
DriveTools, 1–13
E
Electrostatic Discharge, P–2
Enable Input, Definition, P–11
Enclosure Type, P–9
Encoderless, 2–20
ESD, P–2
F
False, Definition, P–11
Fan
Illustration, 5–15
Installation, 5–17
Removal, 5–16
Faults, 2–1
Absolute Overspd, 2–7
Analog Spply Tol, 2–7
Autotune Diag, 2–4
Bus Cycle >5, 2–12
Bus Drop, 2–12
Bus Undervlt, 2–12
Clear Queue, 2–3
Desaturation, 2–11
Diff Drv Type, 2–6
EE Checksum, 2–6
External Flt In, 2–8
Feedback Loss, 2–18
Ground Fault, 2–11
HW Malfunction, 2–6, 2–13
Inv Overload, 2–5
Inv Overtemp Pnd, 2–5
Inv Overtemp Trp, 2–5
InvOvld Pend, 2–5
mA Input, 2–7
Math Limit, 2–7
Mtr Stall, 2–4
MtrOvrld Pnd, 2–4
MtrOvrld Trp, 2–4
Open Circuit, 2–12
Overcurrent, 2–11
Overvoltage, 2–11
Param Limit, 2–7
Prechrg Time, 2–11
Index
AB Spares