VFP Programmer’s Model
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 20-20
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20.4.6 Media and VFP Feature Register 1
The purpose of the Media and VFP Feature Register 1 is to provide information about the
features that the VFP unit contains.
Media and VFP Feature Register 1 is:
• a 32-bit read-only register
• accessible in any mode when the VFP is enabled by the EN bit, see Floating-point
exception register, FPEXC on page 20-16
• accessible only in Privileged modes when the VFP is disabled by the EN bit.
Figure 20-9 shows the bit arrangement for Media and VFP Feature Register 1.
Figure 20-9 Media and VFP Feature Register 1 format
Table 20-10 shows how the bit values correspond with the Media and VFP Feature Register 1
functions.
The values in the Media and VFP Feature Register 1 are implementation defined.
-
31 8 7 3 0
- - -
41112
Table 20-10 Media and VFP Feature Register 1 bit functions
Bits Name Function
[31:12] - Reserved
UNP/SBZ.
[11:8] - Indicates support for media extension, single precision floating point instructions.
0x0
, no support in ARM1176JZF-S processors.
[7:4] - Indicates support for media extension, integer instructions.
0x0
, no support in ARM1176JZF-S processors.
[3:0] - Indicates support for media extension, load/store instructions.
0x0
, no support in ARM1176JZF-S processors.
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