ARM ARM7TDMI - B.5 AMBA Bus Master Veneer

Open Access
B-6
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Daughter Board Schematics
B.5 AMBA Bus Master Veneer
Date: June 14, 1996 Sheet
Size Document Number
B ARM EOI-0016B (AMBAPL
Title
AMBA Bus Master Ven
CB1 4JN
Cambridge
Cherry Hinton
Fulbourn Road
(c) ADVANCED RISC MACHI
N
WSEL
ABORT
VLL
GND
VLL
GND
PIPEF
TMUX1
TMUX0
nWAIT
OE
1
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
GND
10
B7
11
B6
12
B5
13
B4
14
B3
15
B2
16
B1
17
B0
18
OE
19
VCC
20
U3
QS3245
nMABE
nPWAIT
G
N
D
V
C
C
R
E
S
1
P
R
O
T
1
ARE NOT USED
RES1 AND PROT1
IN INITIAL REVISION
1
V50
1
V51
MABE changed to nMABE
PWAIT changed to nPWAIT
WRITE
MCLK
ERROR
WAIT
LOCK
nMREQ
SEQ
MCLK
WAIT
ERROR
WRITE
LOCK
nMREQ
SEQ
RES[1..0]
RES[1..0]
PROT[1..0]
PROT[1..0]
LAST
LAST
LOCK
MCLK
GND
nMREQ
SEQ
1
V52
1
V53
1
V54
1
V55
1
V56
1
V57
PROT0
RES0
GND
WRITE
ERROR
LAST
BMEN0
IO5
7
IO6
8
IO7
9
I0
10
I1
11
GND
12
CLK0/I2
13
IO8
14
IO9
15
IO10
16
IO11
17
I
O
1
2
1
8
I
O
1
3
1
9
I
O
1
4
2
0
I
O
1
5
2
1
V
C
C
2
2
G
N
D
2
3
I
O
1
6
2
4
I
O
1
7
2
5
I
O
1
8
2
6
I
O
1
9
2
7
I
O
2
0
2
8
IO21
29
IO22
30
IO23
31
I3
32
I4
33
GND
34
CLK1/I5
35
IO24
36
IO25
37
IO26
38
IO27
39
I
O
2
8
4
0
I
O
2
9
4
1
I
O
3
0
4
2
I
O
3
1
4
3
V
C
C
4
4
G
N
D
1
I
O
0
2
I
O
1
3
I
O
2
4
I
O
3
5
I
O
4
6
U2
MACH215-12
SOCKET PLCC44
VSS
VLL
VCC
D1
1N4001
R32
2K2
C11
100n
MTBE
MDBE
WSEL
nWAIT
MTBE
MDBE
WSEL
nWAIT
ABORT
ABORT
TMUX[1..0]
TMUX[
REQARM
REQAR
nMABE
nMABE
PIPEF
PIPEF
TRAN[1..0]
TRA
N
BMEN[1..0]
BMEN[
FOR REV 1 TEST CHIP A
N
TRAN[1:0] IS NOT GENE
R
BY MACH CHIP. IF REV0
TRAN[1:0] IS OUTPUT F
R
nPWAIT
nPWAI
VLL
GND
VLL
GND
MDBE
TRAN1
TRAN0
REQARM
OE
1
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
GND
10
B7
11
B6
12
B5
13
B4
14
B3
15
B2
16
B1
17
B0
18
OE
19
VCC
20
U4
QS3245
1
V89
1
V90
1
V91
1
V93
1
V94
1
V95
LEVEL CONVERTOR
POWER SUPPLY
TRANBE
V
C
C
G
N
D
W
A
I
T
O
L
D
T
C
G
N
T
A
R
M
GNTARM
GNTARM
1
V58
1
V59
BMEN0
A
1
C
2
B
3
LK1
SMLINK
VDD
VSS
A
1
C
2
B
3
LK2
SMLINK
Default A-C
BUS MASTER ENABLE 0 BUS MASTER ENABLE 1
Default A-C
BMEN1 OLDTC
A
1
C
2
B
3
LK3
SMLINK
Default B-C
SELECT TEST CHIP REVISION
VDD VCC
VSS VSS
VCC
VCC
GND
VSS
Default A-C
A
1
C
2
B
3
LK4
SMLINK
MTBE
GRANT SELECT
GNTARM
TRANBE
h
rg.
b
oo
k
P
age
6
W
e
d
nes
d
ay,
J
u
l
y
22
,
1998
9
:
18
AM