ARM ARM7TDMI - B.6 Processor in QFP Package

Open Access
B-7
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Daughter Board Schematics
B.6 Processor in QFP Package
Date: June 14, 1996 Sheet
Size Document Number
B ARM EOI-0016B (PROCQF
Title
Processor in QFP pac
CB1 4JN
CAMBRIDGE
CHERRY HINTON
FULBOURN ROAD
(C) ADVANCED RISC MAC
VDDM
VDDFS
VDD
VDD
VSS
VDD
TEST3
APE
nENIN
DBGEN
DBGRQ
BREAKPT
1
V10
1
V11
1
V12
1
V13
1
V19
1
V20
1
V21
1
V22
R16
0R
R17
0R
R18
0R
R19
0R
VDD
VDD
VDD
VDDBL3
BL0
BL1
BL2
1
V1
1
V2
1
V3
1
V4
1
V27
R6
0R
R7
0R
R8
0R
R9
0R
BMEN1
BMEN0
R15
0R
n
F
I
Q
I
S
Y
N
C
V
D
D
M
C
L
K
n
W
A
I
T
A
B
O
R
T
V
S
S
E
E
B
E
C
P
A
C
P
B
n
C
P
I
V
D
D
B
L
3
B
L
2
B
L
1
B
L
0
V
S
S
W
A
I
T
W
S
E
L
T
R
A
N
1
T
R
A
N
0
V
D
D
M
T
B
E
V
S
S
C
O
M
M
R
X
C
O
M
M
T
X
T
M
U
X
1
T
M
U
X
0
R
E
S
1
R14
0R
V
D
D
T
E
S
T
3
T
E
S
T
2
T
B
I
T
V
S
S
n
M
4
n
M
3
n
M
2
n
M
1
n
M
0
V
D
D
n
E
X
E
C
S
E
Q
V
D
D
M
V
D
D
M
n
M
R
E
Q
E
C
L
K
V
S
S
B
I
G
E
N
D
n
I
R
Q
1
V25
VSS
1
A0
2
A1
3
A2
4
VDD
5
A3
6
A4
7
A5
8
VSS
9
A6
10
A7
11
A8
12
VDD
13
A9
14
A10
15
A11
16
VSS
17
A12
18
A13
19
A14
20
VDD
21
A15
22
A16
23
A17
24
VSS
25
A18
26
A19
27
A20
28
VDD
29
A21
30
A22
31
A23
32
VSS
33
A24
34
A25
35
A26
36
VDD
37
A27
38
A28
39
A29
40
VSS
41
A30
42
A31
43
NRW
44
VDD
45
MAS0
46
MAS1
47
NTRANS
48
VSS
49
LOCK
50
NOPC
51
VDD
52
V
S
S
5
3
E
A
B
E
5
4
A
B
E
5
5
A
L
E
5
6
V
D
D
5
7
A
P
E
5
8
D
B
E
5
9
T
E
S
T
0
6
0
V
S
S
6
1
D
0
6
2
D
1
6
3
D
2
6
4
V
D
D
6
5
D
3
6
6
D
4
6
7
D
5
6
8
V
S
S
6
9
D
6
7
0
D
7
7
1
D
8
7
2
V
D
D
7
3
D
9
7
4
D
1
0
7
5
D
1
1
7
6
V
S
S
7
7
D
1
2
7
8
D
1
3
7
9
D
1
4
8
0
V
D
D
8
1
D
1
5
8
2
D
1
6
8
3
D
1
7
8
4
V
S
S
8
5
D
1
8
8
6
D
1
9
8
7
D
2
0
8
8
V
D
D
8
9
D
2
1
9
0
D
2
2
9
1
D
2
3
9
2
V
S
S
9
3
D
2
4
9
4
D
2
5
9
5
D
2
6
9
6
V
D
D
9
7
D
2
7
9
8
D
2
8
9
9
D
2
9
1
0
0
V
S
S
1
0
1
D
3
0
1
0
2
D
3
1
1
0
3
V
D
D
1
0
4
VSS
105
TEST1
106
NENOUTI
107
NENOUT
108
NENIN
109
VDD
110
EDBE
111
SEL1
112
SEL0
113
BUSEN
114
VSS
115
TBE
116
HIGHZ
117
NTDOEN
118
NTRST
119
VDD
120
TDO
121
VDDFS
122
TMS
123
TCK
124
TDI
125
VSS
126
DBGACK
127
BREAKPT
128
DBGRQ
129
DBGEN
130
VDD
131
EXTERN0
132
EXTERN1
133
DBGRQI
134
VDDM
135
VDDM
136
TCK1
137
TCK2
138
VSS
139
TAPSM0
140
TAPSM1
141
TAPSM2
142
TAPSM3
143
VDD
144
IR0
145
IR1
146
IR2
147
IR3
148
VSS
149
RANGEOUT1
150
RANGEOUT0
151
SCREG3
152
SCREG2
153
SCREG1
154
SCREG0
155
VDD
156
V
S
S
1
5
7
C
O
M
M
R
X
1
5
8
C
O
M
M
T
X
1
5
9
N
C
1
6
0
N
C
1
6
1
N
C
1
6
2
B
C
E
1
6
3
V
D
D
1
6
4
B
C
0
1
6
5
B
C
1
1
6
6
F
0
1
6
7
F
1
1
6
8
W
A
I
T
S
E
L
1
6
9
W
A
I
T
2
1
7
0
V
S
S
1
7
1
B
L
0
1
7
2
B
L
1
1
7
3
B
L
2
1
7
4
B
L
3
1
7
5
V
D
D
1
7
6
N
C
P
I
1
7
7
C
P
B
1
7
8
C
P
A
1
7
9
E
E
B
E
1
8
0
V
S
S
1
8
1
N
R
E
S
E
T
1
8
2
A
B
O
R
T
1
8
3
N
W
A
I
T
1
8
4
M
C
L
K
1
8
5
V
D
D
1
8
6
I
S
Y
N
C
1
8
7
N
F
I
Q
1
8
8
N
I
R
Q
1
8
9
B
I
G
E
N
D
1
9
0
V
S
S
1
9
1
E
C
L
K
1
9
2
N
M
R
E
Q
1
9
3
V
D
D
M
1
9
4
V
D
D
M
1
9
5
S
E
Q
1
9
6
N
E
X
E
C
1
9
7
V
D
D
1
9
8
N
M
0
1
9
9
N
M
1
2
0
0
N
M
2
2
0
1
N
M
3
2
0
2
N
M
4
2
0
3
V
S
S
2
0
4
T
B
I
T
2
0
5
T
E
S
T
2
2
0
6
T
E
S
T
3
2
0
7
V
D
D
2
0
8
U1
ARM7TDMIB2-QFP
VSS
A1
A2
VDD
A3
A4
A5
VSS
A6
A7
A8
VDD
A9
A10
A11
VSS
A12
A13
A14
VDD
A15
A16
A17
A0
VDD
VSS
VDD
VSS
VDDM
VDDM
EXTERN1
VSS
SEL0
SEL1
BUSEN
SCREG0
SCREG1
SCREG2
SCREG3
RNGOUT0
RNGOUT1
IR3
IR2
IR1
IR0
TAPSM2
TAPSM3
TAPSM1
TAPSM0
TCK2
TCK1
DBGRQI
VSS
VSS
CPA
D[31..0]
VDD
1
V5
1
V6
1
V7
1
V8
1
V28
1
V29
1
V30
1
V31
1
V32
1
V33
1
V34
1
V35
1
V36
1
V37
1
V38
1
V39
1
V40
1
V41
1
V42
1
V43
1
V44
R10
0R
R11
0R
R12
0R
RES1
RES1
R13
10K
D[31..0] A[31..
0
VDD
VDD
VDD
ALE
ABE
DBE
EEBE
EXTERN0
EXTERN1
CPB
TBE
A[31..0]
TRAN[1..0]
TRAN[1
VDD
1
V9
1
V14
1
V15
1
V16
1
V17
1
V18
1
V23
1
V24
R20
0R
R21
0R
R22
0R
R23
10K
WRITE
TDO
WRITE
SIZE[1..0]
PROT[1..0]
PROT[1
SIZE[1
LOCK
LOCK
TDO
nM[4..0]
nM[4..
0
nEXEC
nEXEC
TBIT
TBIT
DBGACK
DBGACK
nMREQ
SEQ
SEQ
nMREQ
nCPI
nCPI
VDD
VSS
VDDFS
VSS
VDD
SEL0
SEL1
MDBE
nENIN
BUSEN
TDI
TCK
TMS
TDO
VDD
nTRST
TBE
DBGACK
BREAKPT
DBGRQ
DBGEN
EXTERN0
NTDOEN
HIGHZ
MTBE
BIGEND
ISYNC
nFIQ
BIGEND
ISYNC
nFIQ
MDBE
MDBE
WSEL
WAIT
WSEL
WAIT
MCLK
MCLK
nWAIT
ABORT
ABORT
nWAIT
MTBE
1
V45
1
V46
1
V47
TMUX[1..0]
TMUX[1..0]
BMEN[1..0]
BMEN[1..0]
VSS
A18
A19
A20
VDD
A21
A22
A23
VSS
A24
A25
A26
VDD
A27
A28
A29
VSS
A30
A31
VDD
WRITE
SIZE0
SIZE1
PROT1
VSS
VDD
V
S
S
V
S
S
V
D
D
D
6
D
7
D
8
V
S
S
LOCK
PROT0
D
0
D
1
D
2
D
3
D
4
D
5
M
A
B
E
A
B
E
A
L
E
V
D
D
A
P
E
D
B
E
T
E
S
T
0
1
V26
VDD
MABE
R36
0R 1
V97
D
9
V
D
D
D
1
0
D
1
1
V
S
S
D
1
2
D
1
3
D
1
4
V
D
D
D
1
6
D
1
7
V
S
S
D
1
8
D
1
5
D
1
9
D
2
0
V
D
D
D
2
1
D
2
2
D
2
3
V
S
S
D
2
4
D
2
5
D
2
6
V
D
D
D
2
7
D
2
8
D
2
9
V
S
S
D
3
0
D
3
1
V
D
D
VSS
TEST1
nENOUT
nENOUTI
TDI
TCK
TMS
nTRST
TDI
TCK
TMS
nTRST
nIRQ
nIRQ
1
V48
1
V49
CPA
CPA
CPB
CPB
EXTERN[1..0]
EXTERN[1..0]
ECLK
ECLK
COMMRX
COMMTX
COMMTX
COMMRX
h
rg.
b
oo
k
P
age
7
W
e
d
nes
d
ay,
J
u
l
y
22
,
1998
9
:
18
AM