ARM ARM7TDMI - Architecture

Open Access
Circuit Descriptions
3-9
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
3.2.5 EPROM/FLASH ASB Slave
This schematic is shown in A.7 EPROM/FLASH ASB Slave on page A-8.
The EPROM/FLASH subsystem is implemented in two devices:
• one drives the memory strobes and interfaces with ASB (U10)
• the other provides data path steering (U11)
The board contains two sockets:
• an 32-pin DIL socket (U12) into which EPROM or FLASH devices up to 512Kx8
(4MB) can be fitted
• a 44-pin PLCC socket (U13) into which EPROM or FLASH devices up to 256Kx16
(4MB) can be fitted
Therefore, there is one 8-bit wide and one 16-bit wide socket, but only one device may be
driven at a time. Links on the board select:
• whether an 8- or 16-bit device is driven
• whether it is EPROM or FLASH
• the number of bus cycles required to access it
Link field LK6 has the following link positions:
Clock cycles
The number of cycles is either 2, 3, 4 or 5. The cycle time must be carefully selected, taking
into account the system clock frequency and the device speed grade.
For example, for a system clock frequency of 20MHz, cycle time = 50ns.
Table 3-4: Pulse
widths for settings of CYC[1:0]
on page 3-10 shows pulse widths for various settings of
CYC[1:0].
Note
The write-enable strobe length (for FLASH only), is always the number of cycles minus one.
Position Name Description Options Default
1 CYC1 Number of cycles see table below out
2 CYC0 Number of cycles see table below in
3 EPROM Selects EPROM or FLASH out
in
=
=
EPROM
FLASH
in
4 SEL8BIT Selects 8- or 16-bit device out
in
=
=
8-bit
16-bit
out
Table 3-3: LK6 link positions
hrg.book Page 9 Wednesday, July 22, 1998 9:18 AM