Open Access
Circuit Descriptions
3-22
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
3.2.14 APB Expansion Connecters
This schematic is shown in
A.16 APB Expansion Connecters
on page A-17.
This schematic shows six 20-way box headers (POD1-6) which can be used to expand or
monitor the APB. POD6 is spare and can be used to connect external devices to signals on
the board.
For expansion devices, there are four interrupt pins available:
• nINTAPB[2:0]
•nFIQSRC
These are all active low inputs to the interrupt controller, with on-board pull-up resistors.
Note
The
nFIQSRC
pin is also connected to the ASB expansion connectors, so in order to share
the signal line, you must make drivers open-collector. To select external devices
P_SELEX
is available.
If you are planning to build external expansion devices for the APB, refer to
Chapter 5,
Expanding and Monitoring the APB
for further details.
3.2.15 APB Buffers
The APB buffers schematic is shown in
A.17 APB Buffers
on page A-18.
This schematic shows two 16-bit address buffers(U32 and U33) and two 16-bit data buffers
(U30 and U31) that are used to connect the ASB to the APB. These devices are controlled
by the APB and NISA bridge.
3.2.16 Memory Address and Data Buffers
This schematic is shown in
A.18 Memory Address and Data Buffers
on page A-19.
The schematic shows one 16-bit address latch (U34) and two 16-bit data buffers (U35 and
U36) that are used to connect the ASB to the memory devices. These devices are controlled
by the SRAM and DRAM ASB slaves.
hrg.book Page 22 Wednesday, July 22, 1998 9:18 AM
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