ARM ARM7TDMI - Expanding the ASB

Open Access
Expanding and Monitoring the ASB
4-2
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
4.1 Expanding the ASB
Note Please refer to the AMBA Specification (ARM IHI 0001) for a detailed description of the
signals mentioned in this section.
4.1.1 Headers and pinout
The ASB expansion interface comprises six 20-way box headers, horizontally mounted
along the top edge of the development card. The headers are numbered POD7 to POD12.
Each header has a pinout that is compatible with Hewlett Packard HP1650B series logic
analyser pods (HP01650-63203). Unconnected pins are labeled NC. These pins can be
used to connect other signals to the header if required.
Note
If the logic analyser pods described are used, they supply +5V on pin 1, so this should not
be connected to any output on the board. The logic analyser pods have signal inputs on pins
4–19 and a trigger input on pin 3.
The pods are assigned as follows:
POD7: low ASB data bus B_D[15:0] trigger B_CLK
POD8: high ASB data bus B_D[31:16] no trigger input
POD9: low ASB address bus B_A[15:0] trigger nB_CLK
POD10: high ASB address bus B_A[31:16] no trigger input
POD11: ASB control signals no trigger input
POD12: ASB control signals no trigger input
Figure 4-1: Pods 7 and 8
POD7 POD8
NC 1 2 VCC NC 1 2 VCC
B_CLK 3 4 B_D[15] NC 3 4 B_D[31]
B_D[14] 5 6 B_D[13] B_D[30] 5 6 B_D[29]
B_D[12] 7 8 B_D[11] B_D[28] 7 8 B_D[27]
B_D[10] 9 10 B_D[9] B_D[26] 9 10 B_D[25]
B_D[8] 11 12 B_D[7] B_D[24] 11 12 B_D[23]
B_D[6] 13 14 B_D[5] B_D[22] 13 14 B_D[21]
B_D[4] 15 16 B_D[3] B_D[20] 15 16 B_D[19]
B_D[2] 17 18 B_D[1] B_D[18] 17 18 B_D[17]
B_D[0] 19 20 GND B_D[16] 19 20 GND
hrg.book Page 2 Wednesday, July 22, 1998 9:18 AM