ARM ARM7TDMI - Building an ASB Slave Expansion Board

Open Access
Expanding and Monitoring the ASB
4-7
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
4.3 Building an ASB Slave Expansion Board
To build an ASB peripheral or slave that connects to the motherboard, you need some of
the following signals.
B_CLK or nB_CLK if other clock edge is required
B_RES[2:0] only B_RES[1] is usually required
B_D a number of data bits
B_A a number of address bits
B_WRITE transfer direction
B_SIZE[1:0] transfer size
D_SELASB[1:0] select signal reserved for expansion slaves
4.3.1 Slaves
Normally the system decoder asserts B_WAIT, B_ERROR and B_LAST on behalf of the
absent slaves. If the slave needs to drive these signals:
nENASB[1:0] must be driven or tied LOW
In this case, the slave must drive the following signals or the system cannot function
correctly:
B_WAIT waits for the master
B_ERROR signals a slave error
B_LAST signals the last transfer in a burst
If the slave generates interrupts:
nINTASB[1:0] one or more of these IRQ sources
nFIQSRC possibly the FIQ source
hrg.book Page 7 Wednesday, July 22, 1998 9:18 AM