Open Access
Expanding and Monitoring the APB
5-4
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
5.1.2 List of signals
The following list describes each signal.
Signal Description
B_CLK AMBA system clock
nB_CLK AMBA system clock inverted
B_RES[2:0] AMBA reset signals
P_D[31:0] APB data bus
P_A[31:0] APB address bus
P_STB APB strobe
nINTAPB[2:0] interrupt sources, active low, level sensitive
nFIQSRC fast interrupt source, active low, level sensitive
P_SELIC APB select signal for interrupt controller
P_SELRC APB select signal for reset/pause controller
P_SELCT APB select signal for counter/timers
P_SELEX APB select signal for expansion device
P_WRITE APB read/write signal
Table 5-1: APB signals
hrg.book Page 4 Wednesday, July 22, 1998 9:18 AM