ARM ARM7TDMI - ARM HP Inverse Assembler

Open Access
The Logic Analyser Interface
7-2
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
7.1 ARM HP Inverse Assembler
ARM have developed an inverse assembler for use with HP logic analyzers to enable
disassembly of the code. A set of six 2-way box headers are provided on the ARM
Development Board for this purpose (POD 7-12). A further set is mounted on the ARM TDMI
Daughter Board. See the
ARM HP Inverse Assembler User Guide (ARM DUI 0062) for more
information on the inverse assembler.
7.1.1 Connector and pinout
To enable you to observe processor cycles and signals on the ASP or APB buses, a further
six 20-way box headers are mounted along two sides of the AMBA master daughter card.
The headers are numbered POD1 to POD6 and they connect directly to the ARM processor.
Each header has a pinout that is compatible with Hewlett Packard HP1650B series logic
analyser pods (HP01650-63203).
The pods are assigned as follows:
POD1: low data bus D[15:0] no trigger input
POD2: high data bus D[31:16] no trigger input
POD3: low address bus A[15:0] no trigger input
POD4: high address bus A[31:16] no trigger input
POD5: bus control signals trigger MCLK
POD6: bus control signals trigger ECLK
Figure 7-1: Pods 1 and 2
POD1 POD2
NC 1 2 VDD NC 1 2 VDD
NC 3 4 D[15] NC 3 4 D[31]
D[14] 5 6 D[13] D[30] 5 6 D[29]
D[12] 7 8 D[11] D[28] 7 8 D[27]
D[10] 9 10 D[9] D[26] 9 10 D[25]
D[8] 11 12 D[7] D[24] 11 12 D[23]
D[6] 13 14 D[5] D[22] 13 14 D[21]
D[4] 15 16 D[3] D[20] 15 16 D[19]
D[2] 17 18 D[1] D[18] 17 18 D[17]
D[0] 19 20 VSS D[16] 19 20 VSS
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