Open Access
The Logic Analyser Interface
7-3
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Figure 7-2: Pods 3 and 4
Figure 7-3: Pods 5 and 6
POD3 POD4
NC 12 VDD NC 12VDD
NC 3 4 P_A[15] NC 3 4 A[31]
A[14] 5 6 P_A[13] A[30] 5 6 A[29]
A[12] 7 8 P_A[11] A[28] 7 8 A[27]
A[10] 9 10 P_A[9] A[26] 9 10 A[25]
A[8] 11 12 P_A[7] A[24] 11 12 A[23]
A[6] 13 14 P_A[5] A[22] 13 14 A[21]
A[4] 15 16 P_A[3] A[20] 15 16 A[19]
A[2] 17 18 P_A[1] A[18] 17 18 A[17]
A[0] 19 20 VSS A[16] 19 20 VSS
POD5 POD6
NC 1 2 VDD NC 1 2 VDD
MCLK 3 4 nEXEC ECLK 3 4 NC
PIPEF 5 6 nM[1] NC 5 6 NC
nM[0] 7 8 nOPC NC 7 8 NC
MAS[1] 9 10 MAS[0] nM[4] 9 10 nM[3]
nRW 11 12 SEQ nM[2] 11 12 DBGACK
nMREQ 13 14 ABORT nTRANS 13 14 LOCK
nIRQ 15 16 nFIQ TRAN[1] 15 16 TRAN[0]
nRESET 17 18 PWAIT CPA 17 18 CPB
TBIT 19 20 VSS nCPI 19 20 VSS
hrg.book Page 3 Wednesday, July 22, 1998 9:18 AM
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