ARM ARM7TDMI - Using the APB FPGA in Your Own Designs

Open Access
Programming the APB FPGA
9-4
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
9.3 Using the APB FPGA in Your Own Designs
With care, the APB FPGA can be used to implement additional logic. This section describes
how to reprogram the device. Note that this is not a trivial task. You should adopt a VHDL
design methodology and use the default configuration as a starting point.
VHDL for the default configuration is available; details can be found in
Appendix C,
Summary of Programmable Devices
.
9.3.1 Configuring the FPGA
The mode pins of the FPGA can be individually set HIGH or LOW by inserting jumpers onto
the MODE pins of link field (LK16). In the default configuration these pins are linked, pulling
MODE[2:0] LOW and configuring the FPGA for serial master mode. In this mode, the FPGA
reads its configuration from a serial PROM.
The serial PROM is an 8-pin DIL packaged device that can be programmed using a standard
device programmer. The appropriate data file is generated using Xilinx proprietary tools.
MODE[2:0] Name Comment
000 master serial Default, use serial PROM
001 master parallel up not available on this board
010 reserved not available on this board
011 master parallel down not available on this board
100 reserved not available on this board
101 peripheral not available on this board
110 reserved not available on this board
111 slave serial Use download cable
Table 9-2: Configuring the FPGA
hrg.book Page 4 Wednesday, July 22, 1998 9:18 AM