Open Access
Programming the APB FPGA
9-5
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
9.3.2 Connecting the XChecker Cable
If the MODE[2:0] pins are not linked, the FPGA is in master-slave mode. In this mode
the FPGA expects to be configured using the XChecker download cable.
The XChecker cable must be connected to the special 9-pin header provided on the ARM
Development Board. The individual wires of the XChecker cable are labelled to aid
the connection.
The pins are shown in
Figure 9-1: Download cable pin connections
:
Figure 9-1: Download cable pin connections
Preparing a Bit File
To configure an FPGA using the XChecker cable, a configuration bit file is required. This is
generated by the Xilinx XACT place and route tools using the makebits program. This
program can be run on any appropriate logic cell array (*.lca) file.
After you place and route the Xilinx tools, write a file with a *.lca extension. To generate a
bit file type:
makebits -t
filename
.lca
where:
-t ties down unused interconnect internally
This generates a file called
filename
.bit.
1VCC (+5V)
2GND
X this pin is cut
4 CCLK
5D/P
6DIN
7PROG
8INIT
9RST
hrg.book Page 5 Wednesday, July 22, 1998 9:18 AM