ARM ARM7TDMI - Address Timing

Open Access
A-2
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Board Schematics
A.1 Card Outline Drawing
Date: March 8, 1996 Sheet
Size Document Number
B EOI-0011B (DRAWING.
Title
Card Outline Drawi
CB1 4JN
CAMBRIDGE
CHERRY HINTON
FULBOURN ROAD
(C) ADVANCED RISC MAC
TEST PORT
POD9 POD10 POD11 POD12
SRAM
SRAM
S2
ASB EXPANSION
U17
U18
SRAM SEL
13.0
LK18
POD7 POD8
U55
DECODER
U8
SSRAM
U9
SSRAM
TEST CHIP
3.6
8.7
4.5
U13
U10
U54
ARBITER
RESET
CONTROL
EPROM/
FLASH
CONTROL
LK6
CNTRL
S1
U2
CLKDIV
U20 U11
CLK
SEL
LK17
TEST1SRAM
SRAM
U16
SRAM
CONTROL
U1216_BIT
8-BIT
EPROM/FLASH
EPROM/
FLASH
U14
U37
TEST
INTERFACE
CONTROL
DRAM SIMM
BA
U19
U15
SK2SK1
SERIAL PORT B
SERIAL PORT A
TEST2
PARALLEL PORT
INTERRUPT SWITCH
RESET SWITCH
LK9
S3
LK8LK10LK4
LK16
J2
DRAM
CONTROLLER
U29
PERIPHERALS
APB
U21
SERIAL/
PARALLEL
CONTROL
DOWNLOAD
CABLE
LK7
APB/NISA
BRIDGE
EPROM/FLASH
DATA PATH
U25
PC-CARD
CONTROLLER
HEATSINKPOWER CONNECTOR
PC-CARD SLOTS
ALL DIMENSIONS IN INCHES
SWITCHES
--------
S1 CLOCK FREQUENCY SELECT
S2 SRAM SELECT
S3 PARALLEL PORT SWITCHES
POD1 POD2 POD3
APB EXPANSION
2-PIN LINKS
LK4 BIGEND
LK7 P_STB WIDTH
-----------
LK8 INTERRUPT TYPE
LK9 DIRECTION
LK10 ENABLE INTERRUPT
LK17 USE TEST INTERFACE
LK18 REMAP
POD4 POD5 POD6
LK11
LINK FIELDS
-----------
LK6 EPROM/FLASH SELECT
LK11 PARALLEL PORT LINKS
LK16 FPGA LINKS
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22
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1998
9
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18
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