ARM ARM7TDMI - Serial and Parallel Ports

Open Access
A-13
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
Board Schematics
A.12 Serial and Parallel Ports
Date: March 8, 1996 Sheet
Size Document Number
B EOI-0010B (SUPERIO.
Title
Serial and Parallel
P
CB1 4JN
CAMBRIDGE
CHERRY HINTON
FULBOURN ROAD
(C) ADVANCED RISC MAC
1
3
2
5
1
2
2
4
1
1
2
3
1
0
2
2
9
2
1
8
2
0
7
1
9
6
1
8
5
1
7
4
1
6
3
1
5
2
1
4
1
R114
33R
R115
33R
R116
33R
R117
33R
R118
33R
R119
33R
nACK
BUSY
PE
SLCT
nSLCTIN
GND
GND
GND
GND
GND
GND
GND
GNDnSLCTIN
INIT
nAUTOFD
nACK
IO3
IO4
IO5
IO6
IO7
SWITCH
CLOSED - read 0
OPEN - read 1
LEDPP0
LEDPP1
R121
4K7
R122
4K7
R123
4K7
R124
4K7
R125
4K7
R126
470R
R127
470R
1
2
3
4
8
7
6
5
S3
SW DIP-4
R130
10K
R131
10K
D7
LED
YELLOW
D8
LED
YELLOW
1
2
U7A
74HCT14
3
4
U7B
74HCT14
PD3
PD4
PD5
PD6
PD7
VCC
VCC
VCC
VCC
GND
Insert links to
connect LEDs and
switches to
parallel port
R132
10K
R133
10K
+
1
+
3
+
5
+
7
+
9
+
11
+
13
+
15
+
2
+
4
+
6
+
8
+
10
+
12
+
14
+
16
LK11
LINK-8
R205
10K
R206
10K
R207
10K
INTSPA
INTSPB
nINTPP
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
LED0
LED1
LED0
LED1
VCC
SELECT PARALLEL PORT DIRECTION
OUT - I/O (default)
R111
10K
1
2
LK9
LINK
nCSA
nCSB
nCSP
P_D[7..0]
nRESET
nIOR
nIOW
P_A[4..2]
COMMCLK
nCSA
nCSB
nCSP
P_D[7..0]
nRESET
nIOR
nIOW
P_A[4..2]
INTSPA
INTSPB
nINTPP
COMMCLK
VCC
GND
SERIAL/PARALLEL CONTROLLER
MONITOR POINT
IN - output only
TXB
10
DTRB*
11
RTSB*
12
CTSB*
13
D0
14
D1
15
D2
16
D3
17
D4
18
D5
19
D6
20
D7
21
TXRDYA*
22
VCC
23
RTSA*
24
DTRA*
25
TXA
26
G
N
D
2
7
C
T
S
A
*
2
8
C
D
A
*
2
9
R
I
A
*
3
0
D
S
R
A
*
3
1
C
S
A
*
3
2
A
2
3
3
A
1
3
4
A
0
3
5
I
O
W
*
3
6
I
O
R
*
3
7
C
S
P
*
3
8
R
E
S
E
T
*
3
9
V
C
C
4
0
R
X
A
4
1
T
X
R
D
Y
B
*
4
2
I
N
T
S
E
L
*
4
3
RDOUT
44
INTA
45
PD7
46
PD6
47
PD5
48
PD4
49
PD3
50
PD2
51
PD1
52
PD0
53
GND
54
STROBE*
55
AUTOFDXT*
56
INIT
57
SLCTIN*
58
INTP*
59
INTB
60
R
X
R
D
Y
B
*
6
1
R
X
B
6
2
E
R
R
O
R
*
6
3
V
C
C
6
4
S
L
C
T
6
5
B
U
S
Y
6
6
P
E
6
7
A
C
K
*
6
8
B
I
D
E
N
1
G
N
D
2
C
S
B
*
3
C
L
K
4
D
S
R
B
*
5
R
I
B
*
6
G
N
D
7
C
D
B
*
8
R
X
R
D
Y
A
*
9
U21
ST16C552
1
V82
TXB
nDTRB
nRTSB
nCTSB
P_D0
P_D1
n
R
X
R
D
Y
A
G
N
D
n
R
I
B
n
D
S
R
B
n
C
S
B
G
N
D
B
I
D
E
N
n
A
C
K
C
O
M
M
C
L
K
n
D
C
D
B
OUT - disable (default)
PUSH BUTTON INTERRUPT
1
V85
R208
10K
nSLCTIN
INIT
nSTROBE
P
E
B
U
S
Y
S
L
C
T
V
C
C
n
E
R
R
O
R
R
X
B
n
R
X
R
D
Y
B
nAUTOFD
INTSPB
nINTPP
PBINT
LED2
LED3
LED2
LED3
LEVEL SHIFTERS
LEDPP2
LEDPP3
T3O
1
T1O
2
T2O
3
R2I
4
R2O
5
T2I
6
T1I
7
R1O
8
R1I
9
GND
10
VCC
11
C1+
12
V+
13
C1-
14
C2+
15
C2-
16
V-
17
R5I
18
R5O
19
T3I
20
T4I
21
R4O
22
R4I
23
EN
24
SHDN
25
R3O
26
R3I
27
T4O
28
U22
MAX211E
R128
470R
R129
470R
D9
LED
YELLOW
D10
LED
YELLOW
+
1
+
2
LK10
LINK
5
6
U7C
74HCT14
9
8
U7D
74HCT14
11
10
U7E
74HCT14
SA_TX
SA_DTR
SA_RTS
SA_DCD
SA_RX
RXA
nDTRA
TXA
nDCDA
nSTROBE
PD0
PD1
PD2
nACK
VCC
VCC
PA
R
5
9
4
8
3
7
2
6
1
R112
33R
R113
33R
R120
33R
C74
2200p
SA_DCD
SA_RX
SA_DSR
SA_RTS
SA_DSR
SA_CTS
GND
nRTSA
nCTSA
GND
GND
nDSRA
nAUTOFD
nERROR
INIT
IO0
IO1
IO2
GND
SE
R
5
9
4
8
3
7
2
6
1
SA_TX
SA_DTR
GND
SA_CTS
SA_RI
SB_DCD
SB_DSR
SB_RX
SB_RTS
SB_TX
SB_CTS
SB_DTR
SB_RI
GND
SA_RI
nRIA
SA_VN
SA_C2N
SA_C2P
SB_DSR
SB_CTS
SB_RI
GND
nRIB
nRTSB
nCTSB
GND
GND
nDSRB
SB_VN
SB_C2N
SB_C2P
T3O
1
T1O
2
T2O
3
R2I
4
R2O
5
T2I
6
T1I
7
R1O
8
R1I
9
GND
10
VCC
11
C1+
12
V+
13
C1-
14
C2+
15
C2-
16
V-
17
R5I
18
R5O
19
T3I
20
T4I
21
R4O
22
R4I
23
EN
24
SHDN
25
R3O
26
R3I
27
T4O
28
U23
MAX211E
C73
470n
13
12
U7F
74HCT14
GND
VCC
SA_C1P
SA_VP
SA_C1N
SB_TX
SB_DTR
SB_RTS
SB_DCD
SB_RX
RXB
nDTRB
TXB
nDCDB
GND
VCC
SB_C1P
SB_VP
SB_C1N
GND
VCC
Push button to cause
parallel port interrupt
IN - enable
R110
10K
D6
1N4148
R134
10K
GND
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RDOUT
n
I
O
R
n
C
S
P
n
R
E
S
E
T
V
C
C
n
I
N
T
S
E
L
R
X
A
n
T
X
R
D
Y
B
INTSPA
VCC
SW1
SW PUSHBUTTON
BLACK CAP
MONITOR POINTS
1
V83
1
V86
nTXRDYA
P_D3
P_D2
P_D4
P_D5
P_D6
P_D7
VCC
nRTSA
nDTRA
TXA
G
N
D
n
C
T
S
A
n
R
I
A
n
D
S
R
A
n
C
S
A
n
I
O
W
RDOUT
P
_
A
2
P
_
A
3
P
_
A
4
n
D
C
D
A
DECOUPLING CAPACITORS
SELECT INTERRUPT TYPE
OUT - latched mode (default)
IN - ACK mode
MONITOR POINT
C58
10u
C59
100n
C60
100n
C61
100n
C63
100n
C64
100n
1
V84
CAPACITORS FOR LEVEL SHIFTERS
MUST INSERT LINK
C62
100n
C65
0u1
C66
0u1
1
2
LK8
LINK
VCC
GND
S
A
_
C
1
P
S
A
_
C
1
N
S
A
_
C
2
P
S
A
_
C
2
N
GND
VCC
GND
C67
0u1
C68
0u1
C69
0u1
C70
0u1
C71
0u1
C72
0u1
S
A
_
V
P
V
C
C
G
N
D
S
A
_
V
N
S
B
_
C
1
P
S
B
_
C
1
N
S
B
_
C
2
P
S
B
_
C
2
N
S
B
_
V
P
V
C
C
G
N
D
S
B
_
V
N
SE
R
h
rg.
b
oo
k
P
age
13
W
e
d
nes
d
ay,
J
u
l
y
22
,
1998
9
:
18
AM