ASROCK Z690M-ITX/ax - Page 68

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Initial RTL FIF0 Delay Oset
Congure round trip latency FIF0 delay initial oset.
Initial RTL (MC0 C0 A1)
Congure round trip latency initial value.
Initial RTL (MC0 C1 A1)
Congure round trip latency initial value.
Initial RTL (MC1 C0 B1)
Congure round trip latency initial value.
Initial RTL (MC1 C1 B1)
Congure round trip latency initial value.
RTL (MC0 C0 A1)
Congure round trip latency.
RTL (MC0 C1 A1)
Congure round trip latency.
RTL (MC1 C0 B1)
Congure round trip latency.
RTL (MC1 C1 B1)
Congure round trip latency.
ODT Setting
Dimm ODT Training
ODT values will be optimized by Dimm On-Die Termination Training.
ODT WR (A1)
Congure the memory on die termination resistors' WR for channel A1.
ODT WR (B1)
Congure the memory on die termination resistors' WR for channel B1.
ODT NOM (A1)
Congure the memory on die termination resistors' NOM for channel A1.