ASTRO VG Series User Manual

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Setting (2) [Dual (16 bits)], [Normal], configuration [10 + 6 bits]
With channels 1 and 3 forming one set and channels 2 and 4 forming another set, odd-numbered fields are output
using one set and even-numbered fields are output using the other set.
The 10 upper bits are output to channels 1 and 2, and the remaining 6 lower bits are output to channels 3 and 4.
The example is that the resolution is 1280 × 1024, the dot clock frequency is 108 MHz with 16 bits level, 10 bits are
output to channel 1 and 6 bits are output to channel 2.
D 0 D 2 D 4 D 6
・・・
・・・
D 1272 D 1274 D 1276 D 1278
CLK
54MHz
1CH
2CH
3CH
4CH
D 1 D 3 D 5 D 7
・・・
D 1273 D 1275 D 1277 D 1279
[15：6] [15：6] [15：6] [15：6]
[5：0] [5：0] [5：0] [5：0]
[15：6] [15：6] [15：6] [15：6]
[5：0] [5：0] [5：0] [5：0]
・・・
D 1272D 1274D 1276D 1278
[5：0] [5：0] [5：0] [5：0]
D 0 D 2 D 4 D 6
[5：0] [5：0] [5：0] [5：0]
D 1273D 1275D 1277D 1279
・・・
D 1 D 3 D 5 D 7
[15：6] [15：6] [15：6] [15：6] [15：6] [15：6] [15：6] [15：6]
Upper Bit [15:6] Upper Bit [15:6]
Upper Bit [15:6]
Lower Bit [5:0] Lower Bit [5:0]
Lower Bit [5:0]
1CH 2CH 3CH 4CH

ASTRO VG Series Specifications

General

Brand	ASTRO
Model	VG Series
Category	Portable Generator
Language	English