Asus M3N78-CM - Page 73

ASUS M3N78-CM 2-27
Memory Conguration
Enable Bank Memory
Interleaving
Memory Conguration
Bank Interleaving [Auto]
Channel Interleaving [Disabled]
Enable Clock to All DIMMs [Disabled]
MemClk Tristate C3/ATLVID [Disabled]
Memory Hole Remapping [Enabled]
DCT Unganged Mode [Auto]
Power Down Enable [Enabled]
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving.
Conguration options: [Disabled] [Auto]
Channel Interleaving [Disabled]
Allows you to enable the channel memory interleaving.
Conguration options: [Disabled] [Address bits 6] [Address bits 12] [XOR of
Address bits [20:16,6] ] [XOR of Address bits [20:16,9] ]
Enable Clock to All DIMMs [Disabled]
Enables or disables clock to all DIMMs. Conguration options: [Disabled]
[Enabled]
MemClk Tristate C3/ALTVID [Disabled]
Enables or disables the MemClk Tristate C3/ALTVID.
Conguration options: [Disabled] [Enabled]
Memory Hole Remapping [Enabled]
Enables or disables the memory remapping around memory hole.
Conguration options: [Disabled] [Enabled]
DCT Unganged Mode [Auto]
Allow you to enable or disable Unganed mode.
Conguration options: [Auto] [Always]
Power Down Enable [Enabled]
Enables or disables the DDR power down mode.
Conguration options: [Disabled] [Enabled]