Asus P5WDG2 WS Professional - Chipset

4-28
Chapter 4: BIOS 







   






      








 


Advanced Chipset Settings
Congure DRAM Timing by SPD [Enabled]
DRAM ECC Mode [Disabled]
Hyper Path 3 [Auto]
DRAM Throttling Threshold [Auto
Boot Graphic Adapter Priority [PCI Express/PCI]
PEG Buffer Length [Auto]
Link Latency [Auto]
PEG Root Control [Auto]
PEG Link Mode [Auto]
Slot Power [Auto]
High Priority Port Select [Disabled]
Enable or Disable
Congure DRAM
Timing by SPD