Avaya Definity SI - Page 2508

Maintenance Object Repair Procedures
555-233-123
10-1722 Issue 4 May 2002
See ‘‘SYNC (Synchronization)’’ for more details of the escalation plan. There
exists a strong interdependency among the DS1 Interface circuit pack
Maintenance, Synchronization Maintenance, and TDM Bus Clock Maintenance
MOs.
See the section on “TONE-BD” for a discussion of the relationship of Tone-Clock
circuit packs with the various Reliability Options.
Error Log Entries and Test to Clear Values
To n e-
Clock
Role
Synchronization
Facilities
Initial External
Synchronization
Source
Backup External
Synchronization
Source
Internal
Source
MASTER
Stratum 3 Clock Source “A” Source “B”
Local
oscillator
DS1 Primary and
Secondary
DS1 Primary DS1 Secondary
DS1 Primary Only DS1 Primary None
No External Source None None
SLAVE
PNC Duplication Active EI Standby EI
No PNC
Duplication
Active EI None
Table 10-635. TDM Bus Clock Error Log Entries
Error
Type
Aux
Data Associated Test
Alarm
Level
On/Off
Board
1
Test to Clear Value
0
2
0 Any Any Any test tone-clock UUC sh r 1
1(a) 0 None MINOR OFF
18(b) 0 busyout tone-clock
UUC
WARNING OFF release tone-clock UUC
130(c) None
257(d) None WARNING OFF
513(e) Any Clock Circuit Status
Inquiry (#148)
MINOR
3
OFF test tone-clock UUC
769(f) Any Clock Circuit Status
Inquiry (#148)
MAJOR‡ ON test tone-clock UUC sh r 10
1025(g) Any Clock Slip
Inquiry(#149)
test tone-clock UUC sh
1281(h)
1282(h)
Any None MINOR OFF
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