BELL LABS INNOVATIONS Lucent Technologies 3B21D - Page 143

ManualReferenceHardware
CCDescriptionFunctionalUnitControlandOverviewSystem
BusAddressCache
andbitsaddress28(busunidirectional,32-bit,aisbus)CA(AddressCacheThe
Cachethetoinformationaddresscachephysicalconveyswhich)bitsparity4
).SAI(InterfaceAddressStorethefrom)CSU(UnitStorage
BusMemoryCache4-10.Table
CSUSDISAIDESCRIPTIONTYPESIGNALCATEGORY
DATA I/OI/ONCnoninvertedbits,data32TristateCD(31-00)1
I/OI/ONCbitsdata32overbitsparityeven4-byteBidirectionalCDP(35-32)1
ADDRESS INNCOUTbitsaddress28UnidirectionalCA(27-00)1
I/ONCOUTbitsdata32overbitsparityeven4-byteCA(35-32)1
COMMAND INNCOUTcommand10/ReadWriteUnidirectionalSWRT0
INNCOUTbytesizeAccessSCRI211
INNCOUTwordhalfsizeAccessSCRI221
INNCOUTwordquadsizeAccessSQUAD0
INNCOUTcommandRead-Modify-WriteSRMW0
INNCOUTcommandaccessMaintenanceSCRI311
CONTROL INNCOUT)16bitSCR(enableAccessUnidirectionalSCRI161
INNCNC)SREGfrom(modebypassCacheSSR131
OUTNCNC)SREGto(errorandetectedCacheCACHER0
OUTNCINhitCacheCAHIT0
OUTNCINdatawithreadyisCacheCARDY0
INNCOUTaccessstackSubroutineSCRI231
INNCNC)MASCfrom(My-Store-CompleteProcessorPMSCM0
INNCNCSATfromerrorATBnoandHitTranslationATBTHIT1
2000January3Issue254-303-105 4-35