3-73
Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Hardware Installation Guide
OL-14126-12
Chapter 3 Overview: Cisco ASR 1000 Series Aggregation Services Routers SPAs
Cisco DSP SPA for ASR 1000 Series Overview
Each SPA-DSP comprises of seven SP2603 DSP chips having a total of 21 DSP cores (three DSP cores
per SP2603). Based on the complexity of codec (low, medium, high), the density or maximum number
of channels supported per DSP core and maximum channels supported per SPA-DSP are defined.
Table 3-45 provides a matrix for the maximum number of channels supported on the DSP core and on
SPA-DSP, and the complexity type:
Table 3-45 Codec Complexity and Density Supported Matrix
Table 3-46 provides hardware and software compatibility details for a SPA-DSP.
Ta b l e 3 - 4 6 S PA- D S P H a rd w a r e and Software Compatibility
The SPA-DSP supports transcoding for the codecs listed in Table 3-47.
Table 3-47 SPA-DSP-Supported Transcoding Codec List
Codec Complexity or Service
Maximum Supported Density per
DSP Core
Maximum Supported Density per
SPA-DSP
LC (Low complexity)
Voice/xcode
43 903
MC (Medium complexity)
Voice/xcode
28 588
HC (High Complexity)
Voice/xcode
17 357
ISAC Voice/xcode 8 168
Type of DSP
SPA (Product
ID)
ASR1000 Router
Chassis
Supported
Route
Processor
Supported
Power
Requirements
SIPs
Supported
ESPs
Supported
Minimum
Cisco IOS XE
Release
Supported
SPA-DSP ASR 1002,
ASR 1004, and
ASR 1006
Chassis
RP1 and
RP2
25 watts SIP-10
and
SIP-40
ESP-10
and
ESP-40
Cisco IOS XE
Release 3.2S
Codec Name Codec Description
g711alaw G.711 A Law 64000 bps
g711ulaw G.711 u Law 64000 bps
g722-64 G722r64
g723r53 G.723.1 5300 bps
g723r63 G.723.1 6300 bps
g726r16 G.726 16000 bps
g726r24 G.726 24000 bps
g726r32 G.726 32000 bps
g726r40 G.726 40000 bps
g728 G.728 codec
To Next Page
Loading...
