Clevo N750HU - Vcc_Core, Vccgt

Schematic Diagrams
VCC_CORE, VCCGT B - 39
B.Schematic Diagrams
VCC_CORE, VCCGT
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
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VBOOT=0.8V
FOR CV
H-line 42
unused floating.
CORE Max Switching Frequency=421Khz
unused floating.
The unused ISENAxP pins are recommended to be connected to VCC
PSYS&OFSA
GT Max Switching Frequency=425Khz
10k ntc
VCORE IMON GT IMON
NO Load Offset DISABLE
CORE
NO Load Offset
PSYS DISABLE
GT
D02
D02
N750HU_D02_20170223
N750HU_D02_20170223
N750HU_D02_20170307
N750HU_D02_20170307N750HU_D02_20170307
N750HU_D02_20170307
N750HU_D02_20170307
N750HU_D02_20170307
N750HU_D02_20170309
N750HU_D02_20170314 N750HU_D02_20170314
N750HU_D02_20170315
N750HU_D02_20170323
N750HU_D02_20170406
5V
5V
VIN
VREF_VCORE
VREF_VCORE
1.0V_VCCST
1.0V_VCCST
5V
VIN
5V
VREF_VCORE
5V
5V
3.3VS
VCCGT
VIN
VCORE
VREF_VCORE
3.3V
PWM21 39
PWM11 39
CSN21 39
CSN11 39
DRVON139
CSP21 39
CSP11 39
VIN10,17,35,36,37,39,40,41,43
3.3VS8,9,10,11,12,13,14,16,17,18,19,20,22,23,24,25,27,32,33,34,35
VCCSA6,40
5V28,29,31,32,35,37,39,40,42
VCORE5,39
H_CPU_SVIDCLK 4
H_CPU_SVIDALRT# 4
H_CPU_SVIDDAT 4
VCORE_PG 15
VCC_VCORE_SENSE5
VSS_VCORE_SENSE5
VCCGT_SENSE7
VSSGT_SENSE7
ALL_SYS_PWRGD 4,10,15,34
PSYS 43
H_PROCHOT# 4
PWM12 39
CSN12 39
CSP12 39
VCCGT7,39
1.0V_VCCST4,6,16,17,41
3.3V2,10,12,23,27,28,35,37,41
Title
Size Document Number Rev
Date: Sheet
of
6-71-N75H0-D01
D01
[38] VCC_CORE & VCCGT
Custom
38 48Thursday, April 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N75H5-001
Title
Size Document Number Rev
Date: Sheet
of
6-71-N75H0-D01
D01
[38] VCC_CORE & VCCGT
Custom
38 48Thursday, April 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N75H5-001
Title
Size Document Number Rev
Date: Sheet
of
6-71-N75H0-D01
D01
[38] VCC_CORE & VCCGT
Custom
38 48Thursday, April 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N75H5-001
PJ32
*1mm
1 2
PR149
52.3K_1%_04
PR29 0_04
PR54 0_04
PR57
0_04
PC10
*1000p_50V_X7R_04
PR150
0_04
PR48
14.7K_1%_04
PR133
31.6K_1%_04
PR65 10K_1%_04
PJ33
*1mm
1 2
PC22
*1000p_50V_X7R_04
RT1
100k_1%_04_NTC
1 2
PJ13
*CV-40mil
12
PR68
*0_04
PR159
*0_04
PR19 680_1%_04
PR17
43.2K_1%_04
PR125
100_04
PR36
2.37K_1%_04
PR148
*1K_1%_04
PR53 1_1%_06
PR67
10K_04
PR69
100K_1%_04
PR47
0_04
PR27
52.3K_1%_04
PR40
27.4K_1%_04
PR158
20K_04
PR56 49.9_1%_04
PR135
0_04
PR71
100_04
PR22
42.2K_1%_04
PR44 100K _1%_04
PR153 *45.3_1%_04
PR143 0_04
PR64
100_04
PR30
6.49K_1%_04
PR140
432K_1%_06
PC86
1u_6.3V_X5R_04
PR35 0_04
PR58
432K_1%_06
PC78
100p_50V_NPO_04
C42
*0.1u_10V_X7R_04
RT2
100k_1%_04_NTC
1 2
PJ5
*CV-40mil
12
PR146
80.6K_1%_04
PJ16
*1mm
1 2
PR62 10K_06
PC13
0.22u_50V_Y5V_06
PR61 680_1%_04
PC9
*1000p_50V_X7R_04
PC20
4.7u_6.3V_X5R_04
PR51 0_04
PR157
1_06
PR18 680_1%_04
PR144
21.5K_1%_04
GND
57%(
PU2 RT3606BEGQW
ISEN3N
3
PS4
43
VCLK
23
IMONA
19
VSEN
10
ISEN2N
7
ISEN3P
2
ISEN1N
4
NC
40
SET2
13
COMPA
31
FBA
32
RGNDA
29
SETA2
16
VSENA
30
OFSA/PSYS
26
IBIAS
28
ISENA1P
35
SET1
12
PGOOD
47
SETA1
15
PWMA1
42
EN
24
ISEN2P
6
ALERT#
21
ISEN1P
5
IMON
17
COMP
9
ISENA2P
34
ISENA2N
33
FB
8
RGND
11
VCC
27
TSEN
1
VDIO
22
GND
49
DVD
39
ISENA1N
36
PWMA2
41
PWM3
46
PWM1
45
PWM2
44
SET3
14
OFSM
25
TONSET
48
TONSETA
38
TSENA
37
V06
18
VRHOT
20
PR154
*0_04
RT3
EWTF02-103F3I-N
1 2
PR142
10K_06
PJ9 1mm
1 2
PR41
1_04
PR25
36.5K_1%_04
PC23
120pF_50V_NPO_04
PR50
1K_1%_04
PR147 0_04
PR151 45.3_1%_04
PR59
0_04
PJ17
*1mm
1 2
PR32 13K_1%_06
PR70 10K_1%_04
PR141
8.45K_1%_04
PR60
0_04
PC79
*1000p_50V_X7R_04
PR46
100_04
RT5
100k_1%_04_NTC
1 2
PR134 10K_06
PC14
0.47u_6.3V_X5R_04
PR138 0_04
PR136
806_1%_04
PC15 0.1u_16V_X7R_04
PC16
0.22u_50V_Y5V_06
PR55 10_04
PR37
0_04
PC18
*1000p_50V_X7R_04
PR52 499K_1%_06
PC19
47p_50V_NPO_04
PR28 0_04
PJ12 OPEN_4mil
1 2
PR137 0_04
PR139
22.1K_1%_04
PR24 0_04
PR49
0_04
PC21
*1000p_50V_X7R_04
PR42 330K _1%_06
PC11
82p_50V_NPO_04
PR227 *0_06
PR26 1_1%_06
PR128
100_04
PR152 100_04
PR127 10K_1%_04
PR39 0_04
PR34
23.7K_1%_04
PR23 2K_1%_04
PR131 0_04
PR132 0_04
PR130
4.87K_1%_04
PR160
8.45K_1%_04
TONSET
SET2
SET1
SET3
SETA1
SETA2
IMON IMONA
OFSA/PSYS
OFSM
VR_ENABLE
TONSETA
Sheet 38 of 48
VCC_CORE,
VCCGT