EasyManua.ls Logo

Clevo NL41CU - Page 53

Clevo NL41CU
88 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ijıŮ Ūŭ Ŵ
BOTTOM
ijıŮ Ūŭ Ŵ
RTC CLEAR
ijıŮ Ūŭ Ŵ
6-22-24R00-1BB
32.768KHz
6-22-32R76-0BM
CNVi
CRB
LOW:38.4/19.2M
HI:24M
Comet Lake U I,J/20 CNVI/CLK
Use a shielded crystal GND and
isolation external GND
WLAN_CLKREQ# PU 10K_04 IN PCH SIDE
Processor Pullups/Pull downs
20190627 Add for W HL
CML-U:NC
WHL-U:stuff
D02 unstuff
D02 change footprint and value
D02 change footprint and value
PDA bug
PDA bug
20190618 swap pin1
D02 add
D02 EMI add
D02 Main vs 2nd change
D02 Main vs 2nd change
RTCRST#
RTC_VBAT_1
SUSCLK_R
XTAL24_OUT
XTAL24_IN
XCLK_BIASREF
CLKOUT_ITPXDP_P
CLKOUT_ITPXDP_N
RTC_X1
RTC_X2
SRTCRST#
RTCRST#
CPU_C10_GATE#
A4WP_PRESENT
GPPC_H21
GPPC_H21
GPD_7
CPU_C10_GATE#
EMMC_RCOMP
CNVI_WT_RCOMP
SRTCRST#
RTC_VBAT_CON_A
SRCCLKREQ1#
LAN_CLKREQ3#
SSD1_CLKREQ5#
WLAN_CLKREQ2#
SRCCLKREQ4#
SRCCLKREQ1#
SRCCLKREQ4#
SSD1_CLKREQ5#
LAN_CLKREQ3#
WLAN_CLKREQ2#
VCC_RTC
3.3VA
VDD3
3.3VS
3.3VS
VDD3
SM_INTRUDER_N9
SUS_CLK 25
CNVI_WT_D0P25
CNVI_WT_D0N25
CNVI_WT_D1P25
CNVI_WT_D1N25
CNVI_WT_CLKN25
CNVI_GNSS_PA_BLANKING25
CNVI_MFUART2_RXD25
CNVI_MFUART2_TXD25
CNVI_WR_D0N25
CNVI_WR_D0P25
CNVI_WR_D1N25
CNVI_WR_D1P25
CNVI_WR_CLKN25
CNVI_WR_CLKP25
CPU_C10_GATE# 24,32,37
CNVI_WT_CLKP25
3.3VS2,5,6,7,9,14,15,16,17,21,23,24,26,29,30,35,37
3.3VA4,5,6,7,9,12,22,23,30,33
VCC_RTC12
VDD35,6,9,12,21,22,23,24,25,26,29,30,31,32,33,35,37,38
SSD1_CLKREQ5#26
CLK_PCIE_SSD1#26
CLK_PCIE_SSD126
CLK_PCIE_GLAN29
CLK_PCIE_GLAN#29
CLK_PCIE_WLAN25
CLK_PCIE_WLAN#25
WLAN_CLKREQ2#25
LAN_CLKREQ3#29
CLKIN_XTAL_LCP 25
Title
Size Document Number R ev
Date: Sheet
of
6-71-NL4C0-D02
D02
[08] CML U I,J/20 CNVI/CLK
A3
844Monday, August 19, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R ev
Date: Sheet
of
6-71-NL4C0-D02
D02
[08] CML U I,J/20 CNVI/CLK
A3
844Monday, August 19, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
Title
Size Document Number R ev
Date: Sheet
of
6-71-NL4C0-D02
D02
[08] CML U I,J/20 CNVI/CLK
A3
844Monday, August 19, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NL40CU
EMR3 0_04
C196
1u_6.3V_X5R_02
C404 12p_50V_NPO_04
C403 12p_50V_NPO_04
T56
R410
200K_1%_04
R159 10K_04
T57
R189 0_04
R109 100K_04
R411 10K_04
R158 10K_04
C
A
A
D21
BAT54CWG
1
2
3
R139 10K_04
L4 FCM1005KF-121T03
FOR WHL
R533
0_04
C189 0.1u_6.3V_X5R_02
C179 18p_25V_NPO_02
R188 330K_04
J_RTC1
50271-0020N-001
PCB Footprint = 85204-02L
P/N = 6-20-43130-102
1
2
C201
5p_50V_NPO_04
FOR WHL
JOPEN1
*OPEN_10mil-1MM
12
C180 18p_25V_NPO_02
R137 *20K_04
R156 4.7K_04
X1
XTL721-S999-328
12
R173 150_1%_04
C190
1u_6.3V_X5R_02
9 of 20
U1I
CML_U_IP_CCG
CNV_WR_CLKN
CN31
CNV_WR_CLKP
CP31
CNV_WR_D0N
CR30
CNV_WR_D0P
CP30
CNV_WR_D1N
CM30
CNV_WR_D1P
CN30
CNV_WT_CLKN
CP34
CNV_WT_CLKP
CN34
CNV_WT_D0N
CN32
CNV_WT_D0P
CM32
CNV_WT_D1N
CP33
CNV_WT_D1P
CN33
EMMC_RCOMP
CK15
GPP_C9/UART0_TXD
CP14
GPP_C8/UART0_RXD
CR14
GPP_F21/EMMC_CLK
CP16
GPP_F17/EMMC_DATA5
CR18
GPP_F13/EMMC_DATA1
CM20
GPP_F11/EMMC_CMD
CR16
GPP_H21/XTAL_FREQ_SELECT
CF25
GPP_F19/EMMC_DATA7
CM18
GPP_C11/UART0_CTS#
CM14
GPP_F20/EMMC_RCLK
CM16
GPP_F16/EMMC_DATA4
CN18
GPP_F10
CK17
GPP_H23
CM26
GPP_H22
CN26
GPP_F1
CK19
GPP_F18/EMMC_DATA6
CP18
GPP_F0/CNV_PA_BLANKING
CP20
GPD7
BV35
GPP_F3
CN20
GPP_D4/IMGCLKOUT0/BK4/SBK4
CG25
GPP_F2
CG17
GPP_F12/EMMC_DATA0
CR20
CNV_WT_RCOMP_2
CR32
CNV_WT_RCOMP_1
CP32
GPP_H19/TIMESYNC_0
CM27
GPP_C10/UART0_RTS#
CN14
GPP_F14/EMMC_DATA2
CN19
GPP_H18/CPU_C10_GATE#
CN27
GPP_F15/EMMC_DATA3
CM19
GPP_F9/CNV_MFUART2_TXD
CH17
GPP_F8/CNV_MFUART2_RXD
CJ17
GPP_F22/EMMC_RESET#
CN16
GPP_H20/IMGCLKOUT1
CH25
GPP_F23/A4W P_PRESENT
CF17
R408 60.4_1%_04
R175 200_1%_04
R136
10M_06
R534 *45.3K_1%_04
R140 10K_04
R418 *100K_04
R169 10K_04
R186
1K_04
10 of 20
U1J
CML_U_IP_CCG
RTCX1
BN31
CLKOUT_ITPXDP_P
AU2
RTCX2
BN32
XTAL_IN
CK3
XTAL_OUT
CK2
CLKOUT_ITPXDP
AU1
RTCRST#
BR34
CLKOUT_PCIE_P5
BE2
CLKOUT_PCIE_P3
BH4
CLKOUT_PCIE_P2
BC3
CLKOUT_PCIE_P1
BC2
CLKOUT_PCIE_P0
AY3
CLKIN_XTAL
CM3
SRTCRST#
BR37
GPP_B9/SRCCLKREQ4#
CE30
GPP_B10/SRCCLKREQ5#
CF31
GPD8/SUSCLK
BT32
CLKOUT_PCIE_P4
BA2
XCLK_BIASREF
CJ1
GPP_B5/SRCCLKREQ0#
CF32
CLKOUT_PCIE_N5
BE1
CLKOUT_PCIE_N4
BA1
CLKOUT_PCIE_N3
BH3
CLKOUT_PCIE_N2
BD3
CLKOUT_PCIE_N1
BC1
CLKOUT_PCIE_N0
AW2
GPP_B6/SRCCLKREQ1#
CE32
GPP_B7/SRCCLKREQ2#
CF30
GPP_B8/SRCCLKREQ3#
CE31
X3
19001-X-015-3
1 2
34
R187 20K_1%_04
R168 20K_1%_04
R163 100K_04
Sheet 8 of 43
Processor 7/12
Schematic Diagrams
Processor 7/12 B - 9
B.Schematic Diagrams
Processor 7/12

Related product manuals