Table 77. Memory channels
Proce
ssor
Chan
nel A
Chan
nel B
Chann
el C
Chann
el D
Channe
l E
Chann
el F
Channel
G
Channel
H
Channe
l I
Channe
l J
Channe
l K
Channe
l L
Proces
sor 1
Slot
A1
Slot
A5
Slot A3 Slot A9 Slot A7 Slot
A11
Slot A2 Slot A6 Slot A4 Slot A10 Slot A8 Slot A12
Table 78. Supported memory matrix
DIMM type Rank Capacity DIMM rated voltage
and speed
Operating Speed
1 DIMM per channel
(DPC)
DDR5 RDIMM 1 R 16 GB DDR5 (1.1 V), 4800
MT/s
4800 MT/s
2 R 32 GB, 64 GB DDR5 (1.1 V), 4800
MT/s
4800 MT/s
NOTE: DDR4 memory is not supported in the R6615.
General memory module installation guidelines
To ensure optimal performance of your system, observe the following general guidelines when configuring your system memory.
If your system's memory configurations fail to observe these guidelines, your system might not boot, stop responding during
memory configuration, or operate with reduced memory. This section provides information on the memory population rules for
single or dual processor system.
The memory bus operate at speeds up to 4800 MT/s depending on the following factors:
● System profile selected (for example, Performance Optimized, or Custom [can be run at high speed or lower])
● Maximum supported DIMM speed of the processors
● Maximum supported speed of the DIMMs
NOTE: MT/s indicates DIMM speed in MegaTransfers per second.
The system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset
architectural configuration. The following are the recommended guidelines for installing memory modules:
● All DIMMs must be RDIMM DDR5 with the same capacity and width.
○ Mixing different DIMM capacities is not supported.
○ Mixing module types within a memory channel is not supported. All DIMMs populated must be RDIMM.
○ Mixing different widths (x4 & x8) is not supported.
● Populate memory module sockets only if a processor is installed.
○ For single-processor systems, sockets A1 to A12 are available.
￭ A minimum of 1 DIMM must be populated for each installed CPU.
○ In Optimizer Mode, the DRAM controllers operate independently in the 64-bit mode and provide optimized memory
performance.
Table 79. Memory population rules
Processor Configuration Memory population Memory
population
information
Single processor Optimizer (Independent channel)
population order
A{1}, A{2}, A{3}, A{4}, A{5},
A{6}, A{7}, A{8}, A{9}, A{10},
A{11}, A{12}
Odd amount of
DIMMs per
processor
allowed.
● Populate the sockets with white release tabs.
● Persistent memory will not be supported on Genoa based platforms.
● For best performance, populate all memory channels equally (12 DIMMs per CPU) using identical DIMMs.
● Unbalanced or odd memory configurations result in a performance loss and the system may not identify the memory modules
being installed, so always populate memory channels identically with equal DIMMs for best performance.
Installing and removing system components
99
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