ltre
iryut audio
signal
is
fed into ttre
EFFECIBON II
via
ttre INPUI
ptrone
jack
located
on ttre rear
paneI.
ltris signal
is
routed
through an intrut arplifier
stage
to
protrnrly
set the
otrnrating signal
1evel via
ttre INzuI
LEVEI,
control
located
on
the front
panel.
Ihe INPIIT
tE\rH,
control
also
sets
the
gain
of
the total slmtern
(ttrere
is
no
conpensating
antput
leveI
control). The
minimrm
input
rrcltage is 0.1 Vrms.
Ihe
correct
otrnrating
1eve1 is
set by observing the
green
ACTIVE
rpnitor
and
the
red LIMIT npnitor
located
on
the front
paneI.
llhese
LDrs npnitor
ttre
level as
seen
by the
encoding
circuits.
For maxfurum dlznamic range, the
active LD should be
full-on
wittr
a
rare
flashing
of ttre
LI}IIT LD
during
pak
trnssages
in ttre
audio inptrt.
Grce
the
proper
inp:t leve1 has
been set,
the audio signal is
directed to a
pre-enphasis
circuit
to
pre-condition
ttre signal before ttre actual Analog-
to-Digital conversion
takes
place.
After
pre-enptrasis,
ttre
pre-conditioned
signal is
ncxc sent
to tJre
AZb
encoder
to
be converted to
a
digital
signal. It
is here
ttrat DELTNAB
holds
all the aces. Itre Analog-to-Digital
encoding
schenre
is
unique. A carefully
designed
Adaptive Delta
lbdulator converts ttre
audio signal by analyzing
both the
value and
s1ery
rate of ttre signal.
ftre resu]t is ttre rpst accurate
digital
representation
of the
audio signal
trnssible
over the fulI dlnanic
range.
IGxt, the
digital
signal
representing ttre
audio is
stored
in
ttre digital
IIEIIpry. Access to
this rrErnory
is via ttre
trushbutton
switches
located
on
ttre
front
panel.
[Jtrnn
selection
of a
given
deIay,
as indicated
by the
lushbutton,
the digital signal
is
extracted
frqn ttre
rerpry
and sent to ttre
Digital-to-Analog
decoder.
Ir1cte
ttrat ttre
f;7D,
the remory and ttre
D/A
are
slznchronized
to a conmon clock to
insure the
protrnr
addressing of
ttre
renory
banks and to
provide
ttre
sanpling
rate for the A7b encoder and
D/A decoder.
ftre
O/a decoder
is ttre
perfect
conplinent of
the
Adaptive Delta ttlodulation
encoder. At the
p/a
output,
the
signal
is
sent
to an inverting arnplifier
and furttrer directed
to
bottr
the
FEDBACK
and
DEIAY
MD( controls
located
on
the
front
paneI.
Ihe
DEAY
[vlD( control
is a
center
tapped
trntenticrneter,
i.e.,
the
unprocessed
inprt
signal
is alplied at ttre
center tap
and each
phase
of
the
delayed signal
is alplied at ttre
extreme
terminals. As such,
a
single
control
is all ttrat is necessary to mix ttre
processed
signal
(either
phase)
with
the input
(source)
signal.
Ihe
final mix is then de-erphasized
to restore ttre audio to
its
protEr
leve1s.
ftre
outtrxrt
is available at the
GIIP[}T
phone
jack
on ttre
rear-paneI.
Ihe
final audio
signal
available at ttre
Q}IPUT
jack
is furttrer
processed
by
a
trntented
phase
shift circuit
to
simulate
stereo output.
ltris circuit
keeps the
lovr
frequencies
in
tr*rase
t*rile
providing
a
controlled
anount of
phase
shift for mid and
high frequencies.
Itre
result
is
a
very realistic
form of simulated stereo signal. The
sinulated stereo output
is available
by using both the tip
and ring of
ttre OIIIPIIT
jack.
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