Denon DN-HS5500 - Page 35

35
DN-HS5500
SH72060W200FPV Terminal Function
Pin No. Pin Name Symbol I/O DET Ext Ini Res Function
1 -RD SHRD O - External device read enable signal
2 RD/-WR SHRW O - External device read/write enable signal
3PVss D_GND -----GND
4A1 SHA1 O----Address bus
5A2 SHA2 O----Address bus
6A3 SHA3 O----Address bus
7A4 SHA4 O----Address bus
8A5 SHA5 O----Address bus
9A6 SHA6 O----Address bus
10 A7 SHA7 O - - - - Address bus
11 A8 SHA8 O - - - - Address bus
12 A9 SHA9 O - - - - Address bus
13 Vcc V1SH I - - - - Core supply (+1.2V)
14 Vss D_GND - - - - - GND
15PVss D_GND -----GND
16 PVcc V3SH I - - - - I/O supply (+3.3V)
17 A10 SHA10 O - - - - Address bus
18 A11 SHA11 O - - - - Address bus
19 A12 SHA12 O - - - - Address bus
20 A13 SHA13 O - - - - Address bus
21 A14 SHA14 O - - - - Address bus
22 A15 SHA15 O - - - - Address bus
23 A16 SHA16 O - - - - Address bus
24 Vcc V1SH I - - - - Core supply (+1.2V)
25 Vss D_GND - - - - - GND
26 A17 BSHA17 O - - - - Address bus
27 A18 BSHA18 O - - - - Address bus
28 A19 BSHA19 O - - - - Address bus
29 A20 BSHA20 O - - - - Address bus
30 PINT2 PINT2 I - Interrupt request 2 (from IDE to CPU: PINT2)
31 PVcc V3SH I - - - - I/O supply (+3.3V)
32 CKIO CKIO O - PLL circuit clock output (67.73MHz)
33PVss D_GND -----GND
34PLLVss D_GND -----GND
35 PLLVcc PLLVcc I - PLL supply (+1.2V)
36 PVcc V3SH I - - - - I/O supply (+3.3V)
37 -RES PORESET I - Power-on reset
38PVss D_GND -----GND
39 XTAL - O - Not used
40 EXTAL EXTAL I - External clock input (16.9344MHz)
41Pvss D_GND -----GND
42 PVcc V3SH I - - - - I/O supply (+3.3V)
43 NMI NMI - Not used (Non-maskable interrupt)
44PVss D_GND -----GND
45PVss D_GND -----GND
46 /ADTRG ADTRG I - ADTRG
47 IRQ1 IRQ1 I - Interrupt request 3 (from ADSP to CPU: IRQ1)
48 PA4 DRVPWR I - Drive power-on (Drive connect detect)
49 A24 BACK LIGHT O - LCD BACK LIGHT ON/OFF
50 SCK N.C I/O - Not used (SCK)
51 MBRK MBRK O - DD motor control
52 MDIR MDIR O - DD motor control
53 DACK1 DACK1 O - Direct memory access request answer 1
54 MD_CLK2 MD_CLK2 - - - - - GND
55 MD_CLK0 MD_CLK0 - - - - - GND
56 Vss D_GND - - - - - GND
57 Vcc V1SH I - - - - Core supply (+1.2V)
58 MD2 MD2 I - - - - +3.3V
59 MD0 MD0 I - - - - GND
60 IRQ3 IRQ3 I - Interrupt request 3
61 PE9 PE9ÅD - - Not used
62 -WAIT SHRDY I - Wait cycle insert
63 PVcc V3SH I - - - - I/O supply (+3.3V)
64PVss D_GND -----GND
65PVss D_GND -----GND