Denon DRA-700AE - Basic Operation; Initial Operation Steps; Headphone Listening Setup; Speaker Selection

13
DRA-700AE/700AEDAB/500AE
TDA7330B (IC402) FRONT P.W.B.
Nr. Name Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MUXIN
V
ref
COMP
FIL OUT
GND
T1
T3
T4
OSC OUT
OSC IN
T57
RDCL
RDDA
QUAL
ARI
V
CC
T2
FSEL
TM
POR
RDS input signal.
Reference voltage
Not inverting comparator input (smoothing filter)
Filter Output
Ground
Testing output pin (not to be used)
Testing output pin (not to be used)
Testing output pin (not to be used)
Oscillator output
Oscillator Input
Testing output pin: 57KHz clock output
RDS clock output (1187.5Hz)
RDS data output
Output for signal quality indication (High = good)
Output for ARI indication (High when RDS + ARI signals are present)
(High when only ARI is present)
(Low when only RDS is present)
(indefined when no signal is present)
Supply Voltage
Testing output pin (not to be used)
Frequency selector pin: open = 4.332MHz, closed to V
CC
= 8.664MHz
Test mode pin (open = normal RUN)
(closed to V
CC
= Test mode)
Reset Input for testing (active high)
PIN FUNCTION
BLOCK DIAGRAM