Denon DRA-800H - Page 34

VIDEO DIAGRAM
SUB
MAIN
(DVD )
(Blu-ray)
H D M I IN1
H D M I IN2
H D M I IN3
(CBL/SA T )
HDMI RX(MN864787)
P2 RX
P1 RX
P0 RX
TXPO RT0
(MED IA P LAYER)
(GAME )
H D M I IN4
H D M I IN5
HDMI TX(MN864788)
P3 RX
P1 RX
P0 RX
P0 T X
P1 T X
AD V 7623
TRANSCEIVER
28.6363M Hz
S.FLASH
32M/64M
LEGO_RG B D A T A (24bit)
LEG O
OSD Block
P1 RX
P0 RX
H D MI OUT
MONIT OR OU T
P2 RX
RXA
S.FLASH
32M
CEC
IC751
CPU
VDD11: C EC 1V1
PV DD33:CEC3 V3
VDD33:CEC 3V 3
AVDD11:CE C1 V 1
AVDD33:CE C3 V 3
AVDDH 33:CEC3 V 3
VDD11: C EC 1V1
PV DD33:CEC3 V3
VDD33:CEC3V 3
AVDD11:CE C1 V 1
AVDD33:CE C3 V 3
AVDDH 33:CEC3 V 3
CVDD, DVDD: + 1V 8 H
D VDDIO: DV3 V 3
TVDD:DV3 V3
PV DD:+1V 8H
TXA V DD:+ 1 V8H
TXP V DD:+ 1 V8H
TXP LVDD:+1V 8H
VCC:CEC 3V 3
VCC:CEC 3V 3
VCC:MCU _3V3
27.000M H z
27.000M H z
D RA-800H VIDEO BLOCK
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
34