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Denon PMA-50 - Troubleshooting common issues

Denon PMA-50
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GND LINE
POWER- LINE
POWER+ LINE
STBY POWER
PCM
SPDIF DSD
Analog Audio L
Analog Audio R
Audio SW
TCK TDI
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
P16
N14
K15
K16
L16
F14
B16
F16
H13
H12
DIR_INT
OPT_SPDIF1
OPT_SPDIF2
R207
33
R221
33
C232 -
NCE
DGND
DGND
TDO
DGND
TMS
DGND
DGND
DGND
DGND
DGND
DGND
N16
P15
R16
J16
D16
L15
F15
H14
G12
C225 4N7-K
+3.3D
AUX_L
R208
100
AUX_R
USBB_MCLK
R234 22
R232 10K
R230 10K
R228 10K
C281 10000N-K
C253 10000N-K C235 100N-K
C256 100N-K C238 100N-K
C259 100N-K C241 100N-K
C262 100N-K C244 100N-K
C265 100N-K C247 100N-K
C250 100N-K
C273 100N-K
MCU SHEET
COAX_SPDIF
I2S_LRCK_ADSP/USBB
USBB1.8V
+1.2D
DGND
USBB_RST
SDA_USBB_EVOL
SCL_USBB_EVOL
USBB_MUTE
USBB_INT
CLK_SEL1
+5VAD
R224 10K
R213 33
R211 33
DIR_DATA
DIR_LRCK
DIR_BCK
SPDIF_MCK
DIR_DI
DIR_CL
DIR_RST
+3.3D
SPDIF_MCK_O
CH4_5_SCK
DIR_BCK
SPDIF_MCK
USBB_MCLK
R298 33
R273 22
R271 22
R269 33
R267 33
R205 10K
R266 33
R261 0
R256 0
R255 33
R263 33
R253 33
R244 33
FPGA3.3V
T7
SPDIF-MCLK-O
PCM-BCK
J2
I2S_BCK
SPDI
F-MCLK
M1
DSD-DATA-R
P1
DSD-DATA-L
MCLK
M2
TMS
J5
TDO
J4
NCE
J3
NSTATUS
F4
NCSO
D2
DCLK
AMUTE_O
N6
DSD_PCM_SEL
F3
CLK-SEL2
EMPHASIS.
D1
VERCONT.
B1
RESET
A4
FS_STS_B1
A5
FS_STS_B0
A2
FS_STS_A0
DCLK
DSD_PCM_SEL
EMPHASIS.
DGND
VERCONT.
ASDO
RESET
FPGA3.3V
FPGA3.3V
CLK-SEL2
FPGA3.3V
FS_STS_A1
R203 0
PCM-LRCK
NCONFIG
FPGA2.5V
DGNDA3
FS_STS_B0
FPGA1.2V
FPGA1.2V
FPGA3.3V
DGNDA4
M12
E5
DGNDA3
M5
DGNDA1
1.2V_PLL4
N13
N4
1.2V_PLL1
DGND
FPGA1.2V
DGND
DGND
FPGA1.2V
FPGA1.2V
MSEL0
DGND
DGND
1.2V_PLL2
FPGA3.3V
DGND
TEST12
DGND
DGND
TEST3
TEST1
TEST9
TEST8
TEST6
TEST14
TEST13
TEST11
MSEL0
MSEL1
R249 33
R247 33
R294 33
R289 33
R281 0
+1.2D
DGND
FPGA2.5V
AMUTE
FS-STS-B2
FS-STS-B1
VER_CONT
USBB_RST
USBB_INT
DSD_PCM
DIR_INT
DIR_RERR
DIR_CE
DIR_CL
DIR_DO
AUX_L
BT_SPDIF
USBB3.3V
+3.3D
USBB_POWER_DET
DSD_PCM
USBB_MCLK
C290
100N-K
C28
7
22/16-RA2
C228
15P-J
DIR_RERR
C221
1N-K
R216
10K
BT_SPDIF
R220
33
R222
33
R227 10K
R225 10K
R226 10K
C223
100N-K
R212 33
R214 33
C222
10/16
DIR_DO
DIR_CE
COAX_SPDIF
C278
100N-K
FPGA3.3V
R284
33
DIR_LRCK
CH4_5_WS
CH4_5_SD
DIR_DATA
FPGA2.5V
C231 -
SPDIF_MCK
R270 33
R272 22
R268 33
R276 10K
R264
1K
R265
1K
R258 0
R259 10K
R260 10K
R299 33
R286 10K
R252 33
R251 33
R254 33
R285 33
R243 33
R242 33
R250 33
R297 33
T4
T2
J1
I2S_LRCK
R5
PCM-DATA
PCM-LRCK
K1
I2S_DATA
P2
R1
DSD-BCK
TDI
H4
TCK
H3
NCONFIG
H5
ASDO
C1
DATA0
H2
H1
G1
USBB-MUTE
G2
F2
C2
F1
RERR
MUTE
A3
B4
FS_STS_B2
FS_STS_A1
FPGA3.3V
DSD-DATA-L
DSD-BCK
SPDIF-MCLK
I2S_DATA
I2S_LRCK
FPGA3.3V
FPGA3.3V
R201 0
R202 0
DGNDA1
FPGA2.5V
C269 -
SPDIF-MCLK-O
FPGA3.3V
FPGA1.2V
DGNDA2
E12
D4
1.2V_PLL2
1.2V_PLL3
D13
DGND
DGND
DGND
FPGA1.2V
DGND
FPGA3.3V
1.2V_PLL4
DGND
DGND
DGND
TEST2
DGND
TEST7
TEST9
TEST5
TEST2
TEST10
TEST7
TEST15
TEST12
MSEL2
R246 33
R245 33
R248 33
AUX_SEL
R292 33
R293 33
R295 33
R283 10K
R287 33
R288 33
R290 33
R280 0
+3.3D
FPGA3.3V
FS-STS-B0
FS-STS-A1
FS-STS-A0
FPGA_RST
CLK_SEL1
DIR_RST
DIR_DI
AUX_R
ADSP SHEET
C226 100N-K
100/6.3-PVOC227
C229
12P-J
R241
680
C289
100N-K
C288
22/16-RA2
R238 22
R239 22
C220
100N-K
R237 10K
R215
0
R209
100
R231 10K
R233 10K
R229 10K
I2S_BCK_ADSP/USBB
246 135
FPC202
C230 10000N-K
R257 0
R275 10K
C254 -
C255 -
C234 100N-K
C236 100N-K
C237 100N-K
C258 100N-K
C260 100N-K
C261 100N-K
C240 100N-K
C242 100N-K
C243 100N-K
C266 100N-K
C267 100N-K
C248 100N-K
C249 100N-K
C251 100N-K
R204 0
C268 10000N-K
C270 100N-K
C271 100N-K
C272 100N-K
C274 100N-K
C275 100N-K
C276 100N-K
C277 100N-K
R282 0
R291 33
R296 33
MCU SHEET
DSP SHEET
I2S_DATA_ADSP/USBB
1234
5 6 7 8
IC206
EPCQ16SI8N
nCS
DATA
Vcc
GND
Vcc
Vcc
DCLK
ASDI
I2S_BCK_ADSP/USBB
I2S_DATA_ADSP/USBB
FPGA_1.2V
AMUTE
CLK_SEL2
EMPHASIS
VER_CONT
FPGA_RST
FS-STS-B1
FS-STS-B0
FS-STS-A0
FPGA1.2V
DATA0
USBB-MUTE
RERR
DGND
NCSO
MUTE
DGND
FS_STS_A0
L209 BD121T
L207 BD121T
FPGA2.5V
DGNDFPGA1.2V
FPGA1.2V FPGA1.2V FPGA1.2V
NSTATUS DGND
1.2V_PLL3 DGND
FPGA3.3V FPGA3.3V
FS_STS_B2
FS_STS_B1
MSEL1 DGNDCONF_DONE
MSEL2 FPGA3.3V
FPGA2.5V TEST14 TEST11
DGNDDGNDA2 FPGA3.3V
TEST15
DGND
TEST13
FPGA3.3V
FPGA2.5V
USBB1.8V
CH4_5_SD
CH4_5_WS
SDA_USBB_EVOL
SCL_USBB_EVOL
OPT_SPDIF2
COAX_SPDIF
I2S_LRCK_ADSP/USBB
C224
68N-3216
AGND
C280
-
2
3
1
4
X203
24M576(10P)
R223
10K
C219
10/16
R218
10K
10K
R217
R206
0
L204
BD221T
PMA50 DIR & FPGA
USBB_MUTE
DIR_RERR
FPGA_MUTE
FS-STS-A1
FS-STS-B2
L206
BD221T
L205
BD221T
PCM-DATA
DGND
DSD-DATA-R
MC
LK
R262
1K
I2S_BCK
C279
100N-K
L208 BD121T
L210 BD121T
PCM-BCK
FPGA3.3V FPGA3.3V
1.2V_PLL1 DGNDAMUTE_O
DGNDFPGA1.2V
FPGA3.3V
DGND
TEST4
TEST3
AUX_SEL
TEST5TEST1
DGNDDGNDA4 FPGA3.3V
CONF_DONE
TEST6FPGA2.5V
TEST8FPGA3.3V
TEST10
USBB3.3V
USBB_MCLK
CH4_5_SCK
EMPHASIS
FPGA_MUTE
USBB_POWER_DET
USBB_MUTE
OPT_SPDIF1
R236 22
R219
10K
R240
680
33343536
1 2 3 4
37
38
39
40
41
42
43
44
45
46
47
48
5 6 7 8 9 10 11 12
13
14
15
16
17
18
19
20
21
22
23
24
2526272829303132
MPIO_A0
MPIO_A1
MPIO_A2
MPIO_A3
MPIO_C0
MPIO_C1
MPIO_C2
MPIO_C3
MPIO_B0
MPIO_B1
MPO0
MPO1
DOUT
LRCK
BCK
SCKO
DGND
DVDDXTI
XTO
AGND
VCC
FILT
VCOM
AGNDAD
VCCAD
MC/SCL
MS/ADR1
MODE
RXIN7/AD
IN0
RXIN6/ALRCKIO
RXIN5/ABCKIO
RXIN4/ASCKIO
RXIN3
RXIN2
RST
RXIN1
VDDRX
24 MDI/SDA
23 MDO/ADR038 : GNDRX
37 : RXIN0
13 : MPIO_B2
14 : MPIO_B3
ERROR/INTO
47 VINL
NPCM/INT1
48 VINR
IC204
PCM9211
R235 22
L211
BD221T
C257 100N-K
C263 100N-K
C264 100N-K
C233 100N-K
C239 100N-K
C245 100N-K
C246 100N-K
C282 10000N-K
C252 100N-K
C285 10000N-K
T1
P1
M1
K1
H1
F1
C1
D1
A1
B1
T2 T3
P3P2
M3M2
K2 K3
H2 H3
F2 F3
C2 C3
D2 D3
A2 A3
B2 B3
T4 T5
P5P4
M4 M5
K4 K5
H4 H5
F4 F5
C4 C5
D4 D5
A4 A5
B4 B5
T6 T7
P6 P7
M6 M7
K6 K7
H6 H7
F6 F7
C6 C7
D6 D7
A6 A7
B6 B7
T8 T9
P8 P9
M8 M9
K8 K9
H8 H9
F8 F9
C8 C9
D8 D9
A8 A9
B8 B9
T10 T11
P10 P11
M10 M11
K10 K11
H10 H11
F10
F11
C10 C11
D10 D11
A10 A11
B10 B11
T12 T13
P12 P13
M12 M13
K12 K13
H12 H13
F12 F13
C12 C13
D12 D13
A12 A13
B12 B13
T14 T15
P14 P15
M14 M15
K14 K15
H14 H15
F14 F15
C14 C15
D14 D15
A14 A15
B14 B15
T16
P16
M16
K16
H16
F16
C16
D16
A16
B16
N1
L1
R1
J1
G1
E1
R2 R3
N3
L3
N2
L2
J2
G2
E2
J3
G3
E3
R4
N4
L4
R5
N5
L5
J4
G4
E4
J5
G5
E5
R6
N6
L6
R7
N7
L7
J6
G6
E6
J7
G7
E7
R8
N8
L8
R9
N9
L9
J8
G8
E8
J9
G9
E9
R10
N10
L10
R11
N11
L11
J10
G10
E10
J11
G11
E11
R12
N12
L12
R13
N13
L13
J12
G12
E12
J13
G13
E13
R14
N14
L14
R15
N15
L15
G14
E14
J15
G15
E15
J14
R16
N16
L16
J16
G16
E16
L
K
J
H
G
F
E
D
C
B
A
61514131211101987652
T
R
P
N
M
1 3 4
IC205
EP4CE15F17C8N
A7
TO 7A
A8
TO 8A
1B
TO B1
B2
TO 2B
B3
TO 3B
4B
TO B4
B0
TO 0B
SCHEMATIC DIAGRAMS (2/2)
SCHEMATIC DIAGRAMS (3/11)
MAIN_DIR_FPGA
51
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A
B
C
D
E
F
G
H
J
K
L
M
A
B
C
D
E
F
G
H
J
K
L
M
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

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