SEMICONDUCTORS
Only major semiconductors are shown, general semiconductors etc. are omitted to list.
The semiconductor which described a detailed drawing in a schematic diagram are omitted to list.
1. IC's
STM32F103ZG(IC214)
Block diagram
Pinouts and pin descriptions STM32F103xF, STM32F103xG
26/120 Doc ID 16554 Rev 3
Figure 4. STM32F103xF and STM32F103xG XL-density performance line LQFP144 pinout
V
DD_3
V
SS_3
PE1
PE0
PB9
PB8
BOOT0
PB7
PB6
PB5
PB4
PB3
PG15
V
DD_11
V
SS_11
PG14
PG13
PG12
PG11
PG10
PG9
PD7
PD6
V
DD_10
V
SS_10
PD5
PD4
PD3
PD2
PD1
PD0
PC12
PC11
PC10
PA15
PA14
PE2
V
DD_2
PE3
V
SS_2
PE4
NC
PE5
PA13
PE6
PA12
VBAT
PA11
PA10
PC14-OSC32_IN
PA9
PC15-OSC32_OUT
PA8
PF0
PC9
PF1
PC8
PF2
PC7
PF3
PC6
PF4
V
DD_9
PF5
V
SS_9
V
SS_5
PG8
V
DD_5
PG7
PF6
PG6
PF7
PG5
PF8
PG4
PF9
PG3
PF10
PG2
OSC_IN
PD15
OSC_OUT
PD14
NRST
V
DD_8
PC0
V
SS_8
PC1
PD13
PC2
PD12
PC3
PD11
V
SSA
PD10
V
REF-
PD9
V
REF+
PD8
V
DDA
PB15
PA0-WKUP
PB14
PA1
PB13
PA2
PB12
PA3
V
SS_4
V
DD_4
PA4
PA5
PA6
PA7
PC4
PC5
PB0
PB1
PB2
PF11
PF12
VSS_6
V
DD_6
PF13
PF14
PF15
PG0
PG1
PE7
PE8
PE9
V
SS_7
V
DD_7
PE10
PE11
PE12
PE13
PE14
PE15
PB10
PB11
V
SS_1
V
DD_1
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
109
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
72
LQFP144
120
119
118
117
116
115
114
113
112
111
110
61
62
63
64
65
66
67
68
69
70
71
26
27
28
29
30
31
32
33
34
35
36
83
82
81
80
79
78
77
76
75
74
73
Description STM32F103xF, STM32F103xG
12/120 Doc ID 16554 Rev 3
Figure 1. STM32F103xF and STM32F103xG performance line block diagram
1. T
A
= –40 °C to +85 °C (suffix 6, see Table 73) or –40 °C to +105 °C (suffix 7, see Table 73), junction temperature up to
105 °C or 125 °C, respectively.
2. AF = alternate function on I/O port pin.
PA[15:0]
EXT.IT
WWDG
NVIC
12bit ADC1
8 ADINs common
JTDI
JTCK /SWC LK
JTMS/SWDA T
NJTRST
JTDO
=2 to 3 .6V
112 AF
AHB2
MOSI/SD,MISO,
WKUP
F
max
: 48/72 MHz
V
SS
SCL,SDA,SMBA
I2C2
GP DM A1
XTAL OSC
4-16 MHz
XTAL 32 kHz
APB1:F
max
=24 / 36 MH z
HCLK
PCLK1
as AF
Flash1 512 KB
VOLT. REG.
3.3V TO 1.8V
POWER
Backup interface
as AF
Bus matrix
64 bit
RTC
RC HS
Cortex-M3 CPU
Ibus
Dbus
ob l
SRAM 512B
USART1
USART2
SPI2/I2S2
bxCAN device
7 channels
Backup
reg
4 channels
TIM1
4 compl.
SCL,SDA,SMBA
I2C1
as AF
RX,TX, CTS, RTS,
USART3
Temp s ensor
4 Ch , ET R as AF
FCLK
RC LS
Standby
IWDG
@VSW
POR / PDR
SUPPLY
@VDDA
V
BAT
=1.8V to 3 .6V
CK as AF
RX,TX, CTS, RTS,
CK as AF
RX,TX, CTS, RTS,
CK as AF
APB 2:F
max
=48 / 72 MHz
NVIC
SPI1
MOSI,MISO,
SCK,NSS as AF
12bit ADC2
IF
IF
in t er f ace
SUPERVISION
PVD
Reset
Int
AWU
POR
TAMPER-RTC
Sys tem
SCK/CK ,NSS/WS,
UART4
RX,TX as AF
UART5
RX,TX as AF
Reset &
clock
controller
PCLK2
PLL
12bit DAC1
IFIF
IF
12bit DAC2
DAC1_OUT as AF
DAC2_OUT as AF
to the 3 A DCs
8 ADINs common
to the ADC1 & 2
GP DM A2
5 channels
(ALARM OUT)
MCLK as AF
MOSI/SD,MISO,
SCK/CK ,NSS/WS,
MCLK as AF
SWJTAG
TPIU
ETM
Trace/Tr ig
TRACECLK
TRACED[0:3]
as AF
USBDM/CAN_RX
USBDP/CAN_TX
SDIO
FSMC
PCLK3
SRAM
96 Kbyte
64 bit
12bit ADC3
IF
5 ADINs on ADC3
4
4 compl.
BKIN, ETR input as AF
PB[15:0]
PC[15: 0]
PD[15:0]
PE[15:0]
PF[15:0]
PG[15:0]
MPU
2 as AF
1 as AF
1 as AF
4 Ch , ET R as AF
4 Ch, ETR as AF
4 Ch, ETR as AF
D[7:0], CMD
CK as AF
Flash2 512 KB
A[25:0]
D[15:0]
CLK
NOE
NWE
NE[3:0]
NBL[1:0]
NWAIT
NL
as AF
channels
channels
channels
channels
channel
channel
TIM8
TIM9
TIM10
TIM11
V
REF+
V
REF–
TIM6
TIM7
TIM2
TIM3
TIM4
TIM5
TIM12
TIM13
TIM14
OSC_IN
OSC_OUT
OSC32_IN
OSC32_OUT
V
DD
@V
DD
NRST
V
DDA
V
SSA
V
DD
@V
DD
@V
DDA
@V
DDA
Flash
interface
Flash
interface
obl
2 channels as AF
1 channel as AF
1 channel as AF
ai17352
@V
DDA
GPIO port A
GPIO port B
GPIO port C
GPIO port D
GPIO port E
GPIO port F
GPIO port G
APB3 APB2 APB1
BKIN, ETR input as AF
USB 2.0 FS device
SPI3/I2S3
63
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