REV.-A
2.3.2 Reset Circuit
Figure 2-19 shows the reset circuit in block diagram form. The reset circuit issues the /RESET signal.
The control circuits are initialized when they receive the
\RESET
signal. The conditions under which
the
\RESET
signal is output are described below.
When you turn on the power
Immediately after you turn on the power, PST-520
(6C) outputs the
/VCCON
pulse.
E05A49
(46) receives
this pulse and outputs the /DISC pulse. Then the electrical charge through the resistor
(R49)
in the
condenser
(C28,C29)
is discharged. After this,
E05A49
outputs the THLD signal and
E05A49
outputs
the /RESET signal. After a certain time has elapsed, the charge in the condenser builds up again. The
THLD signal is canceled and then the /RESET signal is canceled.
When the CPU performs a reset (CPU self-reset)
The CPU outputs the /RESET signal if there is a /RESET request for
E05A49
and if
E05A49
has output
the /DISC pulse.
n!-
+5V
PST520
Line
(6C)
?
P:n
J
-----------
1
3
OUT
-1-
E05A49
(4B)
------------
,,..
9
mm
D-
lg
R69 2K
11
Figure 2-19.
THLD
DISC
CPU RSET 22 PIN
(2L)
S“2P{9
OPTION RST 1 I PIN
Reset Circuit Block Diagram
2-17
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