Technical Description
10080
Radio Frame
Multiplexer
Modulator
Cable
Interface
Demodulator
Radio Frame
Demultiplexer
SPI
High Speed
TDM
(Wayside traffic,
E1 only)
TDM Bus
PCI Bus
SPI Bus
HCC
HCC
RCC
RAU
Power
Power Bus
Secondary
voltages
DCC
Traffic
DCC
Traffic
BPI Bus (1+1)
BPI Bus (1+1)
Control and
Supervision
XPIC
(MMU2 F 155)
STM-1
Line interface
High-speed bus
Figure 60 Block diagram for MMU2 E/F 155
4.2.2.1 TDM Multiplexer/Demultiplexer
This block interfaces the TDM bus by receiving and transmitting the traffic
(nxE1) and DCC.
It performs 2/8 and 8/34 multiplexing, depending on the traffic capacity, for
further transmission to the Radio Frame Multiplexer.
In the receiving direction, it performs 34/8 and 8/2 demultiplexing , depending
on the traffic capacity. The demultiplexed traffic and DCC are transmitted to
the TDM bus.
In a protected system, the block interfaces the BPI bus, see Section 4.6.2
on page 93.
Note: The TDM block in MMU2 E/F 155 performs no multiplexing/demultiplexi
ng. The traffic in the receiving direction equals 1xE1.
Note: The high speed bus is used together with the integrated ADM – SXU3
B. The STM-1 Line interface on the front of the MMU is not available
when the High Speed bus is used.
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12/221 02-CSH 109 32/1-V1 Uen A 2008-03-14
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