Espressif Systems ESP32-WROOM-32UE User Manual

PRE
LIMINARY
2.
Pin Definitions
Na
me
No
.
Ty
pe
Fu
nction
IO
19
31
I/O
GP
IO19, VSPIQ, U0CTS, EMAC_TXD0
NC
32
-
-
IO
21
33
I/O
GP
IO21, VSPIHD, EMAC_TX_EN
RXD0
34
I/O
GP
IO3, U0RXD, CLK_OUT2
TXD
0
35
I/O
GP
IO1, U0TXD, CLK_OUT3, EMAC_RXD2
IO
22
36
I/O
GP
IO22, VSPIWP, U0RTS, EMAC_TXD1
IO
23
37
I/O
GP
IO23, VSPID, HS1_STROBE
GN
D
38
P
Gr
ound
No
tice:
* GP
IO6 to GPIO11 are connected to the SPI flash integrated on the module and are not connected out.
2.
3 Strapping Pins
ESP3
2 has five strapping pins, which can be seen in Chapter 6 Schematics:
• MTDI
• GPIO0
• GPIO2
• MTDO
• GPIO5
Software can read the values of these five bits from register ”GPIO_STRAPPING”.
During the chip’s system reset release (power-on-reset, RTC watchdog reset and brownout reset), the latches
of the strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip
is powered down or shut down. The strapping bits configure the device’s boot mode, the operating voltage of
VDD_SDIO and other initial system settings.
Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a
strapping pin is unconnected or the connected external circuit is high-impedance, the internal weak pull-up/pull-
down will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset release, the strapping pins work as normal-function pins.
Refer to Table 4 for a detailed boot-mode configuration by strapping pins.
Table 4: Strapping Pins
Vo
ltage of Internal LDO
(V
DD_SDIO)
Pi
n
De
fault
3.
3 V
1.
8 V
MT
DI
Pu
ll-down
0
1
Espressif Systems 5 ESP32-WROOM-32UE User Manual V0.1

Espressif Systems ESP32-WROOM-32UE Specifications

General

Brand	Espressif Systems
Model	ESP32-WROOM-32UE
Category	Control Unit
Language	English