Fostex G16 - Page 18

3. 3.1 A/D Conversion (Refer to circuit diagram for Connector Board)
Signal flow of the A/D conversion section is as follows:
CLK
To the
DATA Controller
Multiplexer
(U2, U3)
on the
Connection
Board
CPU
(UI) TXt>
from
METER OUT
of the R/P Card
r'U AM 1 4
on the SCK
Connection
Board
(1) Parallel input of CH. 1 ~ 16
signal levels
(2) Time divide Parallel input
to 4 channels and send to
CPU analog input
(3) A/D convert analog input
and process in peak hold,
etc. Then, convert this into
serial data and send to
controller together with
clock, etc.
Fig. 3.9 Signal Flow of the A/D conversion section
1. Multiplexer
Multiplexer
U2, U3 and CPU UI are connected as shown in Fig. 3.10
Fig. 3.10 Connection of Multiplexer U2, U3 and CPU UI
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