Fostex G16 - Page 9

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3.

THEORY

OF

OPERATION

3.1

System

control

3.1.1

CPU

U101

(Refer

to

circuit

diagram

for

System

Control)

A

large

part

of

controlling

are

handled

by

the

1

6-bit

C-MOS

one

chip

CPU

(U101

),

M37700.

Loading

motor,

reel

motor,

amplifier

mode

setting,

etc.

are

controlled

by

the

serial

input

from

the

Controller

and

parallel

input

instructions

from

the

main

unit.

1)

RESET

(UI

01-28)

This

is

the

reset

pulse

input

pin

of

the

CPU.

When

power

is

switched

on,

Q7

is

switched

on

by

the

charging

current

to

C29,

and

a

LOW

level

pulse

is

input

to

this

pin

and

the

CPU

is

reset.

At

this

point,

the

transport

enters

the

loading

state.

During

normal

operation,

this

RESET

will

be

at

HIGH

level.

2)

CPI

(U101-7),

CP2

(U101-6),

CP3

(U101-8),

U/D

(U101-52)

These

are

the

count

pulse

input

pins

and

output

pins

of

the

up/down

pulse

generated

Fig-

3.1

The

90°

phase

shifted

count

pulse

generated

in

the

count

sensor

is

input

to

the

#

2

and

#4

pins

of

J25,

waveform

shaped

by

QI,

Q2,

and

U103,

and

input

to

CPI

and

CP3.

The

CPU

determines

UP

or

DOWN

from

the

CPI

~

CP3

inputs,

outputs

HIGH

level

at

forward,

and

LOW

level

at

reverse

from

U/D.

3)

SPLS(U101-14),

TPLS

(U101-16)

SPLS

is

the

supply

side

and

TPLS

is

the

takeup

side

reel

table

revolution

pulse

input

pins.

Together

with

the

count

pulse

of

2),

it

is

used

for

calculating

ZONE

LIMIT.

4)

LM1

(U101-1),

LM2

(U101-80),

CAMO

(U101-77),

CAM1

(U101-76),

CAM2

(U101-75),

CAM

INT

(U101-5)

7

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