13.2 Temperature Controller/Servo/Inverter Connection 13-51
Synchronized writing
Writing starts when the control device memory (command bit) is set (ON). When writing has been finished, the control
device memory (acknowledge bit) is set (ON).
ID Controller
V600-CA1A/V600-CA2A
(Default: OFF (all))
Item Contents
Writing Cycle
The data is written into the device memory addresses registered in the device memory map when the
control device memory (command bit) is set (ON).
When writing of data finishes, the control device memory (acknowledge bit) is set (ON) regardless of
the result of the writing status.
Control Device
Enter a device memory address as the trigger for synchronized writing.
The specified address is used for the device memory map Nos. 0 to 31. Four words are occupied. For
more information, see the V9 Series Reference Manual.
Guarantee synchronism of the
data
When the box is checked, retry is made until the first data is correctly written into the address
registered in the device memory map.
*1
Check the status/error codes at $Pn 356 to 451 to confirm whether or not writing of subsequent data
has been completed successfully.
Infinite retrials
When the box is checked, retry is made until all data is correctly written into the addresses registered
in the device memory map.
*1
Status/error codes are stored in $Pn 356 to 451.
*1 Set the device memory address of the same station number and channel in the device memory map.
*2 This setting is invalid when the macro command “TBL_WRITE” is executed.
DIP Switch Setting
DIP switch 1
SW1
SW2
SW3
Baud rate setting
SW4
SW5
SW6
Communication format
SW7
SW8
Always OFF