Furuno FAR-2807 Series - Page 120

2.1 Processor Unit
2-4
Fig. 2.1.7 SPU Board, 03P9337 Ver.11
S1 (Selection of monitor type)
TP58 (2Vp-p)
DRW CPU
(U19)
ARPA CPU
(U74)
CR4 (Blinks every second.)
Mounting par
t
of NET-100.
DVI-D J204
DVI-D J205
Model 1 2 3 4
FAR-21x7 (MU-201CR) OFF OFF
FAR-28x7 (MU-231CR) ON OFF
FAR-21x7-BB OFF ON
OFF
CR8
(Blinks every
0.5 second.)
S2
(Reset SW)
R401
(Used to adjust OP Video
IN level, 2Vp-p at TP58)
CR5 (Blinks every second.)
CR2/CR3 (Always ON)
CR Check for
CR2 VCC (+5 V)
CR3 3.2 V
CR4 MAIN CPU (U21)
CR5 DRW CPU (U19)
CR8 ARPA CPU (U74)
MAIN CPU
(U21)
Note:
See page.5-2 for SPU Ver-22.