Displays and Controller Boards
11
Document no. M1137272-02
Figure 3 B-DISPX signals
Watchdog
Reset circuitry must generate system reset if watchdog is not refreshed within 2.5 sec.
Master reset
System reset must be generated if master reset goes low. System reset must stay active
1100ms after supply voltages have reached valid levels.
DVI interface
Differential RGB data and clock links must operate according to DVI standard. +5V (±5% @
100mA) voltage must be provided to DVI connector through current limitation circuitry.
DVI
AS-Bus
WDOG
&
RST
+2.5V
+3.3V
+5V
RST
WD_REF
ComBar
LCC10
RST
RS232 to ComBar
On/Standby
+32V
bdispx_signals.vsd
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