Gigabyte B550 AORUS MASTER - SATA Connectors and M.2 SSD Installation

13) M2A_CPU/M2B_CPU/M2C_CPU (M.2 Socket 3 Connectors)
The M.2 connectors support M.2 SATA SSDs or M.2 PCIe SSDs and support RAID conguration. Please
note that an M.2 PCIe SSD cannot be used to create a RAID set either with an M.2 SATA SSD or a SATA
hard drive. Refer to Chapter 3, "Conguring a RAID Set," for instructions on conguring a RAID array.
Follow the steps below to correctly install an M.2 SSD in the M.2 connector.
Step 1:
Locate the M.2 connector where you will install the M.2 SSD, use a screwdriver to unfasten the screw on
the heatsink and then remove the heatsink. Remove the protective lm from the thermal pad on the M.2
connector.
Step 2:
Locate the proper mounting hole based on the length of your M.2 SSD drive. If needed, move the standoff
to the desired mounting hole. Insert the M.2 SSD into the M.2 connector at an angle.
Step 3:
Press the M.2 SSD down and then secure it with the screw. Replace the heatsink and secure it to the original
hole. Make sure to remove the protective lm from the bottom of the heatsink before replacing the heatsink.
Select the proper hole for the M.2 SSD to be installed and refasten the screw and standoff.
12) SATA3 0/1/2/3/4/5 (SATA 6Gb/s Connectors)
The SATA connectors conform to SATA 6Gb/s standard and are compatible with SATA 3Gb/s and SATA
1.5Gb/s standard. Each SATA connector supports a single SATA device. The SATA connectors support
RAID 0, RAID 1, and RAID 10. Refer to Chapter 3, "Conguring a RAID Set," for instructions on conguring
a RAID array.
Pin No. Denition
1 GND
2 TXP
3 TXN
4 GND
5 RXN
6 RXP
7 GND
1
1
SATA3
4 2 0
5 3 1
7
7
DEBUG
PORT
G.QBOFM
DEBUG
PORT
G.QBOFM
DEBUG
PORT
G.QBOFM
F_USB30
F_U
B_ 
F_  F_ 

_
B
BS_
B
SB_
B
_S

S_
_
B
_U
_
B


 
S  
 
123
 
123
 
123
 
123
1
1
1
1
BSS
S
_S 
SSU
 
1 2 3 4 5
 S3
BSSS

U
 __ 3
F_USB3F
S  _
S  _
S  _
SF


B_
B_
F
_0
S
S
_0F
_F
_
_
__B


U
S  _S
_
SF_
B 
USB0_B
B_
B_
F_USB3

F_USB303

_

_3U
S_
80110 60 42
M2A_CPU
F_USB30
F_U
B_ 
F_  F_ 

_
B
BS_
B
SB_
B
_S

S_
_
B
_U
_
B


 
S  
 
123
 
123
 
123
 
123
1
1
1
1
BSS
S
_S 
SSU
 
1 2 3 4 5
 S3
BSSS

U
 __ 3
F_USB3F
S  _
S  _
S  _
SF


B_
B_
F
_0
S
S
_0F
_F
_
_
__B


U
S  _S
_
SF_
B 
USB0_B
B_
B_
F_USB3

F_USB303

_

_3U
S_
80110 60 42
M2B_CPU
(Note)
F_USB30
F_U
B_ 
F_  F_ 

_
B
BS_
B
SB_
B
_S

S_
_
B
_U
_
B


 
S  
 
123
 
123
 
123
 
123
1
1
1
1
BSS
S
_S 
SSU
 
1 2 3 4 5
 S3
BSSS

U
 __ 3
F_USB3F
S  _
S  _
S  _
SF


B_
B_
F
_0
S
S
_0F
_F
_
_
__B


U
S  _S
_
SF_
B 
USB0_B
B_
B_
F_USB3

F_USB303

_

_3U
S_
80110 60 42
M2C_CPU
(Note)
(Note) The PCIEX16 slot shares bandwidth with the M2B_CPU and M2C_CPU connectors. The PCIEX16
slot operates at up to x8 mode when a device is installed in the M2B_CPU or M2C_CPU connector.
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