HEIDENHAIN iTNC 530 HSCI - Operand Addressing (Byte, Word and Double Word)

July 2013 9.6 Operands 1747
9.6.2 Operand addressing (byte, word and double word)
The memory for operands B (8 bits), W (16 bits), and D (32 bits) is only 8 bits
wide. Since the operands can be 8, 16 or 32 bits wide, an overlap of the
memory areas will occur, which you must take into account when addressing
the memory.
For byte addressing, every address is accessible; for word addressing, every
second address; and for double word addressing, every fourth from 0 to 9996.
The address parameter indicates the low byte of the word address (W) and the
lowest byte of the double-word address (D).
Markers, timers and counters are addressed with the corresponding code
letters M, T or C followed by the operand number (e.g. M500, T7, C18).
Double word Word Byte Memory Word address Double-word
address
D0 W2 B3 8 bits High byte Highest byte
B2 8 bits Low byte
W0 B1 8 bits High byte
B0 8 bits Low byte Lowest byte
D4 W6 B7 8 bits High byte
B6 8 bits Low byte
W4 B5 8 bits
B4 8 bits
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D9996 W9998 B9999 8 bits High byte Highest byte
B9998 8 bits Low byte
W9996 B9997 8 bits High byte
B9996 8 bits Low byte Lowest byte