Hi-Link HLK-B20 - Module Block Diagram; Default Pin Functions

3
/13
. Shenzhen Hi-Link Electronic Co., Ltd. Manual
HLK-B20
2.3. Block diagram
UART
GPIO
PWM
I2C
SPI
ADC
HLK-B20
3.3V
16MH
z
RAM(20K)
1 IPEX
Connector
Figure 2
HLK-B20 Module architecture diagram
2.4. Default pin function
No.
Network name
Type
Function description
Default features
1
RSTN
I
Chip enable, high efficiency
CPU reset
2
P07
I/O
P07,SPI_NSS,PWM5
GPIO,SPI,PWM
3
P14
I/O
P14,PWM4
GPIO,PWM
4
P10
I/O
P10,PWM0
GPIO,PWM
5
P11
I/O
P11,PWM1
GPIO,PWM
6
P12
I/O
P12,PWM2
GPIO,PWM
7
P13
I/O
P13,PWM3
GPIO,PWM
8
3V3
P
3.3V power supply
Power
9
P31
I/O
P31
GPIO
10
P32
I/O
P32
GPIO
11
P17
I/O
P17,uart2_rxd
GPIO,uart2
12
P16
I/O
P16, uart2_txd
GPIO,uart2
13
P34
I/O
P32
GPIO