Hitachi HTS542525K9SA00 - Default Chapter; Table of Contents

Table of Contents
1.0. General.........................................................................................................................1
1.1. Introduction........................................................................................................... 1
1.2. References............................................................................................................. 1
1.3. Abbreviations........................................................................................................ 1
1.4. Caution.................................................................................................................. 3
2.0. General features of the drive .....................................................................................5
3.0. Fixed-disk subsystem description..............................................................................9
3.1. Control electronics................................................................................................ 9
3.2. Head disk assembly ............................................................................................. 9
3.3. Actuator ................................................................................................................ 9
4.0. Drive characteristics.................................................................................................11
4.1. Default logical drive parameters......................................................................... 11
4.2. Data sheet............................................................................................................ 12
4.3. World Wide Name Assignment.......................................................................... 12
4.4. Drive organization .............................................................................................. 12
4.4.1 Drive format ..............................................................................................12
4.4.2 Cylinder allocation ....................................................................................13
4.5. Performance characteristics................................................................................ 15
4.5.1 Command overhead ...................................................................................15
4.5.2 Mechanical positioning .............................................................................15
4.5.3 Drive ready time ........................................................................................17
4.5.4 Operating modes ........................................................................................17
5.0. Defect flagging strategy............................................................................................19
6.0. Electrical interface specification..............................................................................21
6.1. Connector location.............................................................................................. 21
6.1.1 4 pin DC power connector .........................................................................22
6.1.2 AT signal connector ..................................................................................22
6.2. Signal definitions (PATA model)....................................................................... 23
6.3. Signal descriptions.............................................................................................. 24
6.4. Interface logic signal levels (pata model)........................................................... 27
6.5. Signal definition (SATA model) ........................................................................ 27
6.5.1 TX+ / TX- ..................................................................................................27
6.5.2 RX+ / RX- .................................................................................................28
6.5.3 Out of band signaling (SATA model) .......................................................28
6.6. Reset timings ...................................................................................................... 29
6.7. PIO timings......................................................................................................... 30
6.7.1 Write DRQ interval time ...........................................................................30
6.7.2 Read DRQ interval time ............................................................................30
6.8. Multi-word DMA timings................................................................................... 31
6.9. Ultra DMA timings............................................................................................. 32
6.9.1 Initiating Read DMA .................................................................................32
6.9.2 Host Pausing Read DMA ..........................................................................33